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| Design | LC/FabLUT | DSP | EBR | SPRAM | Boot | MHz |
|---|---|---|---|---|---|---|
| spinalHDL | 1610 | 0 | 4 | 2 | SPI XiP | |
| engine-V | 307/280 | 0 | 4 | 1 | SPI bootstrap | 56 |
| Design | LE/FabLUT | DSP | SRAM u/L/e | eNVM | Boot | MHz |
|---|---|---|---|---|---|---|
| engine-V | 346/268 | 0 | 0.5/0.5/0.4 | + | M3 | 50 |
| engine-V-opt | ~430/? | 0 | 0.5/2/0.4 | + | M3 | 133? |
| engine-V-fast | ~430/? | 0 | 0.5/17/0 | + | M3 | 150? |
LE is Logic Elements FabLUT is actual number of LUT's used (excludes Interface LUT's)
| Design | Dhrystone | DMIPS | CPU MHz | DMIPS/MHz |
|---|---|---|---|---|
| spinalHDL | 26 | 1.27 |
| Design | Dhrystone | DMIPS | CPU MHz | DMIPS/MHz |
|---|---|---|---|---|
| spinalHDL | 114 | 1.3 |