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Antti Lukats edited this page Nov 16, 2018 · 34 revisions

Microsemi Boards

These two boards are basically the same except the FPGA being SmartFusion2 vs IGLOO2.

A 50MHz system clock 50MHz is provided, UART for console is also available, FPGA (FPGA internal flash) programming is done from Libero.

There are no tools or utilities provided to program the SPI Flash, if you need that to be used own tools and utilities must be developed and provided.

Lattice Boards

Board UART LED Clock Flash Size Flash Type Programming
iCE40P BB NO* RGB 12MHz 4 MByte N25Q032A FT2232H
ice40P MDP Yes RGB 27MHz 1 MByte M25P80 FT2232H
UPDuino V1 NO RGB NONE 4 MByte N25Q032 External
UPDuino V2 NO* RGB NONE 4 MByte W25Q32 FT232H
iCEVision NO RGB 24MHz 1 MByte M25P080 USB Bootloader

List of target boards from contest rules

iCE40 Ultra Plus Breakout Board

http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40UltraPlusBreakoutBoard

Note: FTDI UART pins are shared with the SPI Programming interface und FPGA boot control pins. Optionally a wire can be soldered to connect free FTDI channel to FPGA.

iCE40 Ultra Plus MDP

http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40UltraPlusMobileDevPlatform

This is the best board for the contest as it includes both UART and user clock circuitry.

Note: This board has total 4 UP5K FPGA's RGB LED is connected to FPGA C "U3", there also two regular leds connected to normal IO pins so the use of RGB primitive is not necessary to drive LED.

DuinoBoard V1

https://github.com/gtjennings1/UPDuino_v1_0

This board does not include USB Programmer so you need your FTDI based Cable or use RPi to program this board.

Note: no UART on this board you are limited to LED as user IO, there is also no user Clock so you must run from internal oscillator or provide known clock externally

DuinoBoard V2

https://github.com/gtjennings1/UPDuino_v2_0

USB UART can be used, but SPI Flash SS pin should be pulled high (not sure it is necessary)

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity echoloop is port(
		flash_ss	: out std_logic; 	-- 16
		tx	: out std_logic; 		-- 15
		rx	: in std_logic 			-- 14
	);
end echoloop;

architecture rtl of echoloop is
begin
    flash_ss <= '1';
    tx       <= rx;
end;

There is also no user Clock so you must run from internal oscillator or provide known clock externally

iceVision

This board does not include FTDI based USB Programming circuitry, on-board flash programming is provided by the bootloader in the FPGA multiboot bitstream first image. This bootloader implements soft IP Based USB function. When running FPGA application USB function will not be available.

http://www.dpcontrol.com/wp/?page_id=1223

https://gitlab.dpcontrol.com/icevision/iCEVision_r1_AD17

Note: no UART on this board you are limited to LED as user IO.

Note: this board has extra serial RAM

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