Dhrystone

Please also read this About Dhrystone

For Dhrystone files at the github location (from official rules)

https://github.com/riscv/riscv-tests/tree/master/benchmarks/dhrystone

should be used, there are 3 files:

1. dhrystone.c
2. dhrystone.h
3. dhrystone_main.c

Those files should be used without modifications. Howewer there are more files needed to compile Dhrystone for riscv - we must assume that those other files should also be taken from the same riscv github repository riscv-tests

Additional files used by Dhrystone

1. util.h - pulled in from dhrystone_main.c
2. syscalls.c (was mis-spelled here, sorry)
3. linker script
4. crt.S

Changes needed to sources

util.h

To get correct Dhrystone printout it is needed to redefine HZ, otherwise the printout would be meaningless. This can be done in util.h so the main 3 source files would remain untouched.

Please use LL at the end to avoid negative Dhrystone numbers, you can place this code into util.h:

#undef HZ
#define HZ CPU_CLK

Then you can add -DCPU_CLK=50000000LL to the compiler options to compile Dhrystone for CPU with clock of 50MHz

This should match the max clock frequency your SoftCPU can run - on given FPGA board, this would be different value for Microsemi vs Lattice targets.

syscalls.c

While it is not directly prohibited by the contest rules to change this file I would touch it as little as possible as it does define some of the functions used by the Dhrystone benchmark.

static uintptr_t syscall(uintptr_t which, uint64_t arg0, uint64_t arg1, uint64_t arg2)
{
/*
 * implement UART printstring here: 
 * arg1 is pointer to null terminated string
 * arg2 is max length (fixed 64 bytes)
 */
}

This is only change required. It is of course also possible to implement QEMU compatible tohost handling and leave this file unchanged as well. But the judges will not disqualify your entry if you re-implement the QEMU syscall for the SoftCPU running on iCE40 Ultra Plus.

IMPORTANT: Please do not play with this file, you may get disqualified. Changing a single line of C code in syscalls.c would boost Dhrystone from 99007 to 129866 (in simulator running at flat 1 CPI at 50MHz), this is tested with engine-V-simulator - both the original good and dhrystone-fake binaries are included with the simulator.

crt.S

crt.S that is included within riscv-tests github has STKSHIFT defined as 17, this would generate too large stack area, you can just reduce it, or then supply own crt.S file.

  # give each core 128KB of stack + TLS
//#define STKSHIFT 17

Now you can define STKSHIFT in compiler options as needed (to reduce RAM usage)