Skip to content
Antti Lukats edited this page Dec 14, 2018 · 88 revisions

Welcome to the wiki for RISC-V Contest 2018

Smallest Lattice

Design LC/FabLUT DSP EBR SPRAM Boot
spinalHDL 1610 0 4 2 SPI XiP
engine-V 307/280 0 4 1 SPI bootstrap
fwrisc 1060 0 4 ? ?

Smallest Microsemi

Design LE/FabLUT DSP SRAM u/L/e eNVM Boot
engine-V 346/268 0 1/1/0.4 + M3
fwrisc ?/1060 0 2/0/? + ?

LE is Logic Elements FabLUT is actual number of LUT's used (excludes Interface LUT's)

Fastest Lattice

Design Dhrystone DMIPS CPU MHz DMIPS/MHz
spinalHDL 26 1.27

Fastest Microsemi

Design Dhrystone DMIPS CPU MHz DMIPS/MHz
spinalHDL 114 1.3
Clone this wiki locally