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Enable AVX-512BW and AVX-512DQ target features in AVX-512 dispatch #629

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merged 1 commit into from
Mar 20, 2025
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Enable AVX-512BW and AVX-512DQ target features in AVX-512 dispatch #629

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3 changes: 3 additions & 0 deletions rten-simd/src/isa_detection.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ pub mod macos {
// avx512f, as that is implied if the extensions are supported.
sysctl_bool(c"hw.optional.avx512vl").unwrap_or(false)
&& sysctl_bool(c"hw.optional.avx512bw").unwrap_or(false)
&& sysctl_bool(c"hw.optional.avx512dq").unwrap_or(false)
})
}

Expand Down Expand Up @@ -79,6 +80,7 @@ pub mod macos {
/// - AVX512F
/// - AVX512VL
/// - AVX512BW
/// - AVX512DQ
///
/// These features are available on Skylake (2016) and later.
/// See <https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#AVX-512_CPU_compatibility_table>.
Expand All @@ -90,6 +92,7 @@ pub fn is_avx512_supported() -> bool {
if is_x86_feature_detected!("avx512f")
&& is_x86_feature_detected!("avx512vl")
&& is_x86_feature_detected!("avx512bw")
&& is_x86_feature_detected!("avx512dq")
{
true
} else {
Expand Down
4 changes: 4 additions & 0 deletions rten-simd/src/safe/dispatch.rs
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Expand Up @@ -35,8 +35,11 @@ pub fn dispatch<Op: SimdOp>(op: Op) -> Op::Output {
{
#[cfg(feature = "avx512")]
{
// The target features enabled here must match those tested for by `Avx512Isa::new`.
#[target_feature(enable = "avx512f")]
#[target_feature(enable = "avx512vl")]
#[target_feature(enable = "avx512bw")]
#[target_feature(enable = "avx512dq")]
unsafe fn dispatch_avx512<Op: SimdOp>(isa: impl Isa, op: Op) -> Op::Output {
op.eval(isa)
}
Expand All @@ -49,6 +52,7 @@ pub fn dispatch<Op: SimdOp>(op: Op) -> Op::Output {
}
}

// The target features enabled here must match those tested for by `Avx2Isa::new`.
#[target_feature(enable = "avx2")]
#[target_feature(enable = "avx")]
#[target_feature(enable = "fma")]
Expand Down