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[wb_facq_core] Sample widths with more than 128 bits should be spaced by at least 'width / 128' cycles, otherwise data will be lost

Status: Open.

#19 In lnls-dig/infra-cores;

· augustofg opened on Apr 17, 2023

[wb_acq_core] Channels with 768 bits width causes alignment issues

Status: Open.

#18 In lnls-dig/infra-cores;

· augustofg opened on Apr 12, 2023

[wb_trigger_iface] Trigger direction is set to Trasmitter Mode after reset

Status: Open.

#10 In lnls-dig/infra-cores;

· augustofg opened on Apr 29, 2022

[wb_acq_core] reserved bits in use by HALCS aren't documented

Status: Open.

#9 In lnls-dig/infra-cores;

· ericonr opened on Feb 22, 2022

[common/trigger_io] g_sync_edge should be externable controllable

Status: Open.

#2 In lnls-dig/infra-cores;

· lerwys opened on Nov 29, 2017

[common/trigger_io] Separate trigger direction and trigger polarity

bug

Status: Open.

#1 In lnls-dig/infra-cores;

· lerwys opened on Nov 29, 2017