prbs_gen_for_sys_id_tb: add testbench

lnls-dig · Mar 30, 2023 · a1b7144 · a1b7144
1 parent 4fdd06d
commit a1b7144
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diff --git a/testbench/common/prbs_gen_for_sys_id_tb/Manifest.py b/testbench/common/prbs_gen_for_sys_id_tb/Manifest.py
@@ -0,0 +1,9 @@
+files = [
+    "prbs_gen_for_sys_id_tb.vhd",
+]
+
+modules = {
+    "local" : [
+        "../../../",
+    ],
+}
diff --git a/testbench/common/prbs_gen_for_sys_id_tb/ghdl/.gitignore b/testbench/common/prbs_gen_for_sys_id_tb/ghdl/.gitignore
@@ -0,0 +1,4 @@
+prbs_gen_for_sys_id_tb
+prbs_gen_for_sys_id_tb.ghw
+*.cf
+*.o
diff --git a/testbench/common/prbs_gen_for_sys_id_tb/ghdl/Manifest.py b/testbench/common/prbs_gen_for_sys_id_tb/ghdl/Manifest.py
@@ -0,0 +1,9 @@
+action = "simulation"
+sim_tool = "ghdl"
+top_module = "prbs_gen_for_sys_id_tb"
+
+modules = {"local" : ["../"]}
+
+ghdl_opt = "--std=08"
+
+sim_post_cmd = "ghdl -r --std=08 %s --wave=%s.ghw --assert-level=error"% (top_module, top_module)