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[SYCL] Pass SPIR-V extensions explicitly to jit compiler #17359

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Mar 11, 2025
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69 changes: 58 additions & 11 deletions sycl-jit/jit-compiler/lib/translation/SPIRVLLVMTranslation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,62 @@ using namespace jit_compiler::translation;
using namespace llvm;

SPIRV::TranslatorOpts &SPIRVLLVMTranslator::translatorOpts() {
static auto Opts = []() -> SPIRV::TranslatorOpts {
// Keep this in sync with clang/lib/Driver/ToolChains/Clang.cpp
// TODO: consider introducing a config file that both clang and jit-compiler
// could use during options setting.
std::vector<SPIRV::ExtensionID> AllowedExtensions {
SPIRV::ExtensionID::SPV_EXT_shader_atomic_float16_add,
SPIRV::ExtensionID::SPV_EXT_shader_atomic_float_add,
SPIRV::ExtensionID::SPV_EXT_shader_atomic_float_min_max,
SPIRV::ExtensionID::SPV_KHR_no_integer_wrap_decoration,
SPIRV::ExtensionID::SPV_KHR_float_controls,
SPIRV::ExtensionID::SPV_KHR_linkonce_odr,
SPIRV::ExtensionID::SPV_KHR_expect_assume,
SPIRV::ExtensionID::SPV_KHR_uniform_group_instructions,
SPIRV::ExtensionID::SPV_KHR_non_semantic_info,
SPIRV::ExtensionID::SPV_KHR_shader_clock,
SPIRV::ExtensionID::SPV_KHR_cooperative_matrix,
SPIRV::ExtensionID::SPV_INTEL_subgroups,
SPIRV::ExtensionID::SPV_INTEL_media_block_io,
SPIRV::ExtensionID::SPV_INTEL_device_side_avc_motion_estimation,
SPIRV::ExtensionID::SPV_INTEL_fpga_loop_controls,
SPIRV::ExtensionID::SPV_INTEL_unstructured_loop_controls,
SPIRV::ExtensionID::SPV_INTEL_fpga_reg,
SPIRV::ExtensionID::SPV_INTEL_blocking_pipes,
SPIRV::ExtensionID::SPV_INTEL_function_pointers,
SPIRV::ExtensionID::SPV_INTEL_kernel_attributes,
SPIRV::ExtensionID::SPV_INTEL_io_pipes,
SPIRV::ExtensionID::SPV_INTEL_inline_assembly,
SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_integers,
SPIRV::ExtensionID::SPV_INTEL_float_controls2,
SPIRV::ExtensionID::SPV_INTEL_vector_compute,
SPIRV::ExtensionID::SPV_INTEL_fast_composite,
SPIRV::ExtensionID::SPV_INTEL_fpga_buffer_location,
SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_fixed_point,
SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_floating_point,
SPIRV::ExtensionID::SPV_INTEL_variable_length_array,
SPIRV::ExtensionID::SPV_INTEL_fp_fast_math_mode,
SPIRV::ExtensionID::SPV_INTEL_fpga_cluster_attributes,
SPIRV::ExtensionID::SPV_INTEL_loop_fuse,
SPIRV::ExtensionID::SPV_INTEL_long_composites,
SPIRV::ExtensionID::SPV_INTEL_optnone,
SPIRV::ExtensionID::SPV_INTEL_memory_access_aliasing,
SPIRV::ExtensionID::SPV_INTEL_fpga_invocation_pipelining_attributes,
SPIRV::ExtensionID::SPV_INTEL_arithmetic_fence,
SPIRV::ExtensionID::SPV_INTEL_bfloat16_conversion,
SPIRV::ExtensionID::SPV_INTEL_joint_matrix,
SPIRV::ExtensionID::SPV_INTEL_global_variable_decorations,
SPIRV::ExtensionID::SPV_INTEL_masked_gather_scatter,
SPIRV::ExtensionID::SPV_INTEL_tensor_float32_rounding,
SPIRV::ExtensionID::SPV_EXT_relaxed_printf_string_address_space,
SPIRV::ExtensionID::SPV_INTEL_fpga_argument_interfaces,
SPIRV::ExtensionID::SPV_INTEL_fpga_latency_control,
SPIRV::ExtensionID::SPV_INTEL_fp_max_error,
SPIRV::ExtensionID::SPV_INTEL_cache_controls,
SPIRV::ExtensionID::SPV_INTEL_task_sequence,
SPIRV::ExtensionID::SPV_INTEL_bindless_images,
};
static auto Opts = [&]() -> SPIRV::TranslatorOpts {
// Options for translation between SPIR-V and LLVM IR.
// Set SPIRV-V 1.4 as the maximum version number for now.
// Note that some parts of the code depend on the available builtins, e.g.,
Expand All @@ -34,16 +89,8 @@ SPIRV::TranslatorOpts &SPIRVLLVMTranslator::translatorOpts() {
TransOpt.enableGenArgNameMD();
// Enable mem2reg.
TransOpt.setMemToRegEnabled(true);
// Enable all extensions.
// TODO: Specifically enable only the
// extensions listed in the KernelInfo.
// FIXME: Because there's no size provided,
// there's currently no obvious way to iterate the
// array of extensions in KernelInfo.
TransOpt.enableAllExtensions();
// TODO: Remove this workaround.
TransOpt.setAllowedToUseExtension(
SPIRV::ExtensionID::SPV_KHR_untyped_pointers, false);
for (auto &Ext : AllowedExtensions)
TransOpt.setAllowedToUseExtension(Ext, true);
TransOpt.setDesiredBIsRepresentation(
SPIRV::BIsRepresentation::SPIRVFriendlyIR);
// TODO: We need to take care of specialization constants, either by
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