This repository contains homework assignments based on the course "Hardware Description Language Design" at NCHU.
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ALU: Arithmetic Logic Unit supporting arithmetic operations like addition, subtraction, finding maximum and minimum values, and logical operations including AND, OR, XOR, and XNOR.
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FF: Flip-Flops, including DFF (Data Flip-Flop), TFF (Toggle Flip-Flop), and an enable signal for control.
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Comparator: Features a 4-bit Comparator and a combined 16-bit Comparator, providing three output results: greater than, less than, and equal to.
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Counter: Configurable to count upwards, downwards, in hexadecimal, or in decimal.
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Vending Machine: Implemented using a Finite State Machine (FSM), supports inputs of 10 and 50 units of currency, four products, four price points, change return, and product dispensing.
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Debouncing: Debouncing for transitions from 0 to 1 and 1 to 0, implemented using an FSM.
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RAM4096X16: Composed of 1024x8 RAMs, forming a single port RAM. In write mode, output data is in high-impedance state.
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Stack: Standard stack implementation with PUSH, POP, and CLEAR control signals.
Each folder contains Verilog code and spec.png, which visually describes the project's specifications or circuit diagram.