Added Xilinx UltraScale+ MPSoC CSU Support #545
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dgarske
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Enabled support for offloading SHA3 hashing to CSU hardware using PKA=1. Added support for enabling JTAG at runtime if CSU_DEBUG is set. Requires patching PMUFW to enable register access. See: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2587197506/Zynq+UltraScale+MPSoC+JTAG+Enable+in+U-Boot
danielinux
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Mar 13, 2025
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This looks great.
I only have one objection about the PKA naming because that came from "public key accelerator" on other targets. Could this perhaps be renamed to CSU_SHA3 or HW_SHA3 or something more specific? (docs/Targets.md and tools/config.mk to be updated accordingly)
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Added Xilinx UltraScale+ MPSoC CSU Support: