Remote-HWA / SideLine_Zynq Star 8 Code Issues Pull requests SideLine is a novel power side-channel vector based on delay-line components widely implemented in high-end SoC. aes zynq attack hardware openssl delay remote rsa side-channel delay-line sideline delay-locked-loop Updated Mar 25, 2021 C
josephgravellier / sideline Star 0 Code Issues Pull requests SideLine is a software-based power side-channel analysis vector. It uses delay-lines (located in SoC memory controllers) as power meters. attack hardware sensor remote power software soc side-channel system-on-chip delay-line side-channel-analysis delay-locked-loop software-based delay-lines Updated Nov 24, 2020 HTML