TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems

This is an HTML/Javascript CPU simulator and assembler for the CPU I designed. Originally, I created this CPU on paper many years ago for a homework assignment in college. More recently, I implemented my design in the Logisim logic simulator, and eventually it ran on an FPGA.

A small and simple 8-bit CPU built in Logisim. The project also includes an assembler and a manual for those who want to learn how a processor works.

The Mythical CPU Simulator for Real Students

💡 WepSIM: Web Elemental Processor SIMulator 📱 💻 🖥️

A software simulator of how an OS might schedule processes

CPU Simulator written in Python

An educational resource that enables students to better visualize the execution of assembly code

Simulator for the MIC-1 CPU described in Andrew S. Tanenbaum’s textbook Structured Computer Organization

Simple Web-based 16-bit Microprocessor Assembler Simulator (8085 Working Progress)

Simulating the architecture of a computer in the terminal (Assembler + Simulator)

Implementation of 8-Bit CPU based on Von-Neumann Architechture in HDL

Tera - A simulated ternary (base 3) CPU, assembly language, assembler and decompiler. Uses trytes made up of 9 trits rather than bytes of 8 bits.

A GUI implementation of a CPU sim project originally developed by Wojciech S. Gac

a goofy 8 bit cpu

Implementation of Utility based cache partitioning research paper in Champsim simulator

Visualizes/animates the dataflow between RAM and CPU components while running a short assembly program of your choice

A Y86-64 processor simulator written in JavaScript (Node.js) and C++11

This is a second version my previous RPNv1 project. This project demonstrates how a CPU works the fetch, decode, execute, and store operations.

A C++ command line program that simulates a custom CPU to which one can load instructions in a custom assembler language and see the registries' changes.