fpga_course_code

this is the code consisting of VHDL, Verilog, and UCF files for the Udemy FPGA course using the ELBERT

Name		Name	Last commit message	Last commit date
Latest commit History 34 Commits
Blink1_UCF		Blink1_UCF
Blink1_UCF.ucf		Blink1_UCF.ucf
Blink1_VHDL.vhd		Blink1_VHDL.vhd
Blink1_modified.ucf		Blink1_modified.ucf
Blink1_modified.vhd		Blink1_modified.vhd
Blink1_vhdl		Blink1_vhdl
Button1constraints.ucf		Button1constraints.ucf
Buttons1.v		Buttons1.v
Buttons2.ucf		Buttons2.ucf
Buttons2_VHDL.vhd		Buttons2_VHDL.vhd
LCD_HD44780.vhd		LCD_HD44780.vhd
LCD_constraints.ucf		LCD_constraints.ucf
MegaLink_TopLevwelETop level Elbert demo modulelbert		MegaLink_TopLevwelETop level Elbert demo modulelbert
Parts_List.txt		Parts_List.txt
README.md		README.md
SSEG2_VHDL.vhd		SSEG2_VHDL.vhd
SSEG3_UCF.ucf		SSEG3_UCF.ucf
SSEG4_Verilog.v		SSEG4_Verilog.v
SSEG4_verilogUCF.ucf		SSEG4_verilogUCF.ucf
SSeg1		SSeg1
SSeg1_UCF.ucf		SSeg1_UCF.ucf
SSeg_VHD.vhd		SSeg_VHD.vhd
StepperMotor.vhd		StepperMotor.vhd
StepperMotorUCF.ucf		StepperMotorUCF.ucf
audio_ucf.ucf		audio_ucf.ucf
audio_vhdl.vhd		audio_vhdl.vhd
megalink		megalink

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