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Remove deprecated uarch counters; support RVC for benchmarks
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Andrew Waterman committed Jul 12, 2016
1 parent d5fa5fa commit b6c8a03
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Showing 2 changed files with 13 additions and 27 deletions.
1 change: 1 addition & 0 deletions benchmarks/common/crt.S
Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,7 @@ _start:

j _init

.align 2
trap_entry:
addi sp, sp, -272

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39 changes: 12 additions & 27 deletions benchmarks/common/syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -32,60 +32,45 @@ static long handle_frontend_syscall(long which, long arg0, long arg1, long arg2)
return magic_mem[0];
}

// In setStats, we might trap reading uarch-specific counters.
// The trap handler will skip over the instruction and write 0,
// but only if a0 is the destination register.
#define read_csr_safe(reg) ({ register long __tmp asm("a0"); \
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
__tmp; })

#define NUM_COUNTERS 18
#define NUM_COUNTERS 2
static long counters[NUM_COUNTERS];
static char* counter_names[NUM_COUNTERS];

static int handle_stats(int enable)
{
int i = 0;
#define READ_CTR(name) do { \
while (i >= NUM_COUNTERS) ; \
long csr = read_csr_safe(name); \
long csr = read_csr(name); \
if (!enable) { csr -= counters[i]; counter_names[i] = #name; } \
counters[i++] = csr; \
} while (0)
READ_CTR(mcycle); READ_CTR(minstret);
READ_CTR(0xcc0); READ_CTR(0xcc1); READ_CTR(0xcc2); READ_CTR(0xcc3);
READ_CTR(0xcc4); READ_CTR(0xcc5); READ_CTR(0xcc6); READ_CTR(0xcc7);
READ_CTR(0xcc8); READ_CTR(0xcc9); READ_CTR(0xcca); READ_CTR(0xccb);
READ_CTR(0xccc); READ_CTR(0xccd); READ_CTR(0xcce); READ_CTR(0xccf);

READ_CTR(mcycle);
READ_CTR(minstret);

#undef READ_CTR
return 0;
}

void tohost_exit(long code)
void __attribute__((noreturn)) tohost_exit(long code)
{
tohost = (code << 1) | 1;
while (1);
}

long handle_trap(long cause, long epc, long regs[32])
{
int* csr_insn;
asm ("jal %0, 1f; csrr a0, 0xcc0; 1:" : "=r"(csr_insn));
long sys_ret = 0;

if (cause == CAUSE_ILLEGAL_INSTRUCTION &&
(*(int*)epc & *csr_insn) == *csr_insn)
;
else if (cause != CAUSE_MACHINE_ECALL)
if (cause != CAUSE_MACHINE_ECALL)
tohost_exit(1337);
else if (regs[17] == SYS_exit)
tohost_exit(regs[10]);
else if (regs[17] == SYS_stats)
sys_ret = handle_stats(regs[10]);
regs[10] = handle_stats(regs[10]);
else
sys_ret = handle_frontend_syscall(regs[17], regs[10], regs[11], regs[12]);
regs[10] = handle_frontend_syscall(regs[17], regs[10], regs[11], regs[12]);

regs[10] = sys_ret;
return epc+4;
return epc + ((*(unsigned short*)epc & 3) == 3 ? 4 : 2);
}

static long syscall(long num, long arg0, long arg1, long arg2)
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