Fix envcfg check when S/H-mode is not available

riscv-software-src · Jan 21, 2025 · 64d27a5 · 64d27a5
1 parent 58da6a2
commit 64d27a5
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h
@@ -193,10 +193,10 @@ static inline bool is_aligned(const unsigned val, const unsigned pos)
 #define require_envcfg(field) \
   do { \
     if (((STATE.prv != PRV_M) && (m##field == 0)) || \
-        ((STATE.prv == PRV_U && !STATE.v) && (s##field == 0))) \
+        (p->extension_enabled('S') && (STATE.prv == PRV_U && !STATE.v) && (s##field == 0))) \
       throw trap_illegal_instruction(insn.bits()); \
-    else if (STATE.v && ((h##field == 0) || \
-                        ((STATE.prv == PRV_U) && (s##field == 0)))) \
+    else if (p->extension_enabled('H') && STATE.v && ((h##field == 0) || \
+                        (p->extension_enabled('S') && (STATE.prv == PRV_U) && (s##field == 0)))) \
       throw trap_virtual_instruction(insn.bits()); \
   } while (0);