Draft: Major updates

.github/workflows/verilator-ci.yml

@@ -0,0 +1,92 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Solderpad Hardware License, Version 0.51, see LICENSE for details.
+# SPDX-License-Identifier: SHL-0.51
+
+# Some CI tests run on our GitLab servers due to licenses and tools
+name: verilator-ci
+on: [push, pull_request, workflow_dispatch]
+jobs:
+  verilator-ci:
+    name: Public Verilator CI
+    runs-on: ubuntu-22.04
+    container:
+      image: fconti/pulp-verilator:latest
+      volumes: 
+        - ${{ github.workspace }}:/workspaces
+    strategy:
+      matrix:
+        test: [
+          sequential_bare_tests/dct,
+          sequential_bare_tests/fft2,
+          sequential_bare_tests/rijndael,
+          sequential_bare_tests/jacobi-2d-imper,
+          sequential_bare_tests/bitDescriptor,
+          sequential_bare_tests/stencil_vect,
+          sequential_bare_tests/keccak,
+          sequential_bare_tests/fir,
+          sequential_bare_tests/stencil,
+          sequential_bare_tests/ipm,
+          sequential_bare_tests/towerofhanoi,
+          sequential_bare_tests/crc32,
+          sequential_bare_tests/conv2d,
+          sequential_bare_tests/seidel,
+          sequential_bare_tests/fibonacci,
+          sequential_bare_tests/gauss-2d,
+          sequential_bare_tests/aes_cbc,
+          sequential_bare_tests/bubblesort,
+          sequential_bare_tests/fdtd-1d,
+          sequential_bare_tests/jacobi-1d-imper,
+          sequential_bare_tests/fft,
+          riscv_tests/testBitManipulation,
+          riscv_tests/testVecCmp,
+          riscv_tests/testAddSubNorm,
+          riscv_tests/testMisaligned,
+          riscv_tests/testALU,
+          riscv_tests/testMAC3,
+          riscv_tests/testVecArith,
+          riscv_tests/testDotMul,
+          riscv_tests/testVecLogic,
+          riscv_tests/testCnt,
+          riscv_tests/testVecRelat,
+          riscv_tests/testShufflePack,
+          riscv_tests/testMUL,
+          # riscv_tests/testHWLP,
+          riscv_tests/testMacNorm,
+          riscv_tests/testVariadic,
+          riscv_tests/testMAC,
+          riscv_tests/testLoadStore,
+          riscv_tests/testALUExt,
+          riscv_tests/testBuiltins
+        ]
+    steps:
+      - name: Checkout repository
+        uses: actions/checkout@v2
+      - name: Check container environment
+        run: |
+          echo "Running on:"
+          cat /etc/os-release
+      - name: Check Verilator version
+        shell: bash
+        run: |
+          cd /workspaces
+          verilator --version
+      - name: Verilate
+        shell: bash
+        run: |
+          cd /workspaces
+          mkdir -p utils/bin && touch utils/bin/bender
+          make checkout
+          make verilate
+      - name: Checkout software
+        shell: bash
+        run: |
+          git submodule update --init --recursive
+      - name: SW tests
+        shell: bash
+        env:
+          VERILATOR_PATH: /workspaces/build/verilator
+        run: |
+          cd /workspaces
+          source sw/pulp-runtime/configs/pulpissimo_cv32.sh
+          cd sw/regression_tests/${{ matrix.test }}
+          make clean all run platform=verilator bootmode=fast_debug

.gitlab-ci.yml

@@ -51,6 +51,7 @@ build_rtl:
     - make build
     - echo "Fetching VIPs"
     - ./target/sim/vip/get-vips.sh --yes # --gitlab
+    - rm -rf build/questasim/tcl_files; cp -R target/sim/questasim/tcl_files build/questasim/tcl_files # workaround: tcl_files symlink seems not to work in CI, replacing it with copy
   artifacts:
     name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME-$CI_COMMIT_SHORT_SHA"
     paths:

Bender.lock

@@ -1,7 +1,7 @@
 packages:
   adv_dbg_if:
-    revision: 19eeef8cae1cbec7413877b3f29fe0bd078748d7
-    version: 0.0.2
+    revision: 040cdc9131e2dcda9d6053cb302d115ac8020b72
+    version: null
     source:
       Git: https://github.com/pulp-platform/adv_dbg_if.git
     dependencies: []
@@ -41,8 +41,8 @@ packages:
     - apb
     - common_cells
   axi:
-    revision: 9402c8a9ce0a7b5253c3c29e788612d771e8b5d6
-    version: 0.39.3
+    revision: 39f5f2d51c5e524f6fc5cf8b6e901f7dcc5622d7
+    version: 0.39.6
     source:
       Git: https://github.com/pulp-platform/axi.git
     dependencies:
@@ -57,16 +57,16 @@ packages:
     dependencies:
     - common_cells
   common_cells:
-    revision: 0d67563b6b592549542544f1abc0f43e5d4ee8b4
-    version: 1.35.0
+    revision: c27bce39ebb2e6bae52f60960814a2afca7bd4cb
+    version: 1.37.0
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
     - common_verification
     - tech_cells_generic
   common_verification:
-    revision: 9c07fa860593b2caabd9b5681740c25fac04b878
-    version: 0.2.3
+    revision: fb1885f48ea46164a10568aeff51884389f67ae3
+    version: 0.2.5
     source:
       Git: https://github.com/pulp-platform/common_verification.git
     dependencies: []
@@ -79,6 +79,29 @@ packages:
     - common_cells
     - fpnew
     - tech_cells_generic
+  cv32e40x:
+    revision: fe5e7f41ad284b5aee583a727503bb6f1097daab
+    version: null
+    source:
+      Git: https://github.com/pulp-platform/cv32e40x.git
+    dependencies: []
+  fir-hwpe:
+    revision: 0397301c727e2f232e0f508fbdc13401c023fa26
+    version: 2.0.2
+    source:
+      Git: https://github.com/pulp-platform/fir-hwpe.git
+    dependencies:
+    - hci
+    - hwpe-ctrl
+    - hwpe-stream
+    - zeroriscy
+  fir-xifu:
+    revision: 2b1a71fa7310c20ae0824b93669766713ebcec88
+    version: 0.1.3
+    source:
+      Git: https://github.com/pulp-platform/fir-xifu.git
+    dependencies:
+    - cv32e40x
   fpnew:
     revision: a8e0cba6dd50f357ece73c2c955d96efc3c6c315
     version: null
@@ -112,21 +135,22 @@ packages:
     - common_verification
     - register_interface
     - tech_cells_generic
+  hci:
+    revision: d31af36ebcaf2196fb51676b40782aa8cbd9cc69
+    version: null
+    source:
+      Git: https://github.com/pulp-platform/hci.git
+    dependencies:
+    - cluster_interconnect
+    - hwpe-stream
+    - l2_tcdm_hybrid_interco
   hwpe-ctrl:
-    revision: 1916c72f024175f1fe351acc3db3c6e9925a117d
-    version: 1.7.3
+    revision: 877d676329785f7bba042402e0a6f329a387573d
+    version: null
     source:
       Git: https://github.com/pulp-platform/hwpe-ctrl.git
     dependencies:
     - tech_cells_generic
-  hwpe-mac-engine:
-    revision: cd48c574f1972ecbe02d3f463a0e12a92acde484
-    version: 1.3.3
-    source:
-      Git: https://github.com/pulp-platform/hwpe-mac-engine.git
-    dependencies:
-    - hwpe-ctrl
-    - hwpe-stream
   hwpe-stream:
     revision: 65c99a4a2f37a79acee800ab0151f67dfb1edef1
     version: 1.8.0
@@ -147,6 +171,12 @@ packages:
     source:
       Git: https://github.com/pulp-platform/jtag_pulp.git
     dependencies: []
+  l2_tcdm_hybrid_interco:
+    revision: fa55e72859dcfb117a2788a77352193bef94ff2b
+    version: 1.0.0
+    source:
+      Git: https://github.com/pulp-platform/L2_tcdm_hybrid_interco.git
+    dependencies: []
   pulp_io:
     revision: da6f8817b667f17973ecb19cb1e7aa4347108716
     version: 0.1.0
@@ -166,8 +196,8 @@ packages:
     - udma_sdio
     - udma_uart
   pulp_soc:
-    revision: bf65372aab4edd404160170e2a4d2c63b27ab5f2
-    version: 5.0.1
+    revision: c783d4724acf0585ba5534e6b24257a52a4800ef
+    version: null
     source:
       Git: https://github.com/pulp-platform/pulp_soc.git
     dependencies:
@@ -180,8 +210,10 @@ packages:
     - cluster_interconnect
     - common_cells
     - cv32e40p
+    - cv32e40x
+    - fir-hwpe
+    - fir-xifu
     - fpnew
-    - hwpe-mac-engine
     - ibex
     - jtag_pulp
     - pulp_io
@@ -190,6 +222,12 @@ packages:
     - scm
     - tech_cells_generic
     - timer_unit
+  pulpissimo_essentials:
+    revision: null
+    version: null
+    source:
+      Path: target/synthesis/bender/pulpissimo_essentials
+    dependencies: []
   pulpissimo_optional_vips:
     revision: null
     version: null
@@ -213,8 +251,8 @@ packages:
     - common_cells
     - register_interface
   register_interface:
-    revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d
-    version: 0.4.4
+    revision: 5daa85d164cf6b54ad061ea1e4c6f3624556e467
+    version: 0.4.5
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:
@@ -243,12 +281,18 @@ packages:
       Git: https://github.com/pulp-platform/tbtools.git
     dependencies: []
   tech_cells_generic:
-    revision: 7968dd6e6180df2c644636bc6d2908a49f2190cf
-    version: 0.2.13
+    revision: 8149cde5a03521065ce602891f227df53b128581
+    version: null
     source:
       Git: https://github.com/pulp-platform/tech_cells_generic.git
     dependencies:
     - common_verification
+  tech_cells_gf22fdx:
+    revision: null
+    version: null
+    source:
+      Path: target/synthesis/bender/tech_cells
+    dependencies: []
   timer_unit:
     revision: 4c69615c89db9397a9747d6f6d6a36727854f0bc
     version: 1.0.3
@@ -328,3 +372,9 @@ packages:
     dependencies:
     - common_cells
     - udma_core
+  zeroriscy:
+    revision: cc4068a0ccb7691cd062b809c34b2304e7fbfa36
+    version: null
+    source:
+      Git: https://github.com/yvantor/ibex.git
+    dependencies: []

Bender.yml

@@ -16,14 +16,17 @@ dependencies:
   common_cells:                { git: "https://github.com/pulp-platform/common_cells.git",       version: 1.21.0 }
   apb:                         { git: "https://github.com/pulp-platform/apb.git",                version: 0.2.4 }
   jtag_pulp:                   { git: "https://github.com/pulp-platform/jtag_pulp.git",          version: 0.2.0 }
-  pulp_soc:                    { git: "https://github.com/pulp-platform/pulp_soc.git",           version: 5.0.1 }
+  pulp_soc:                    { git: "https://github.com/pulp-platform/pulp_soc.git",           rev: c783d47 } # branch fc/verilator
   tbtools:                     { git: "https://github.com/pulp-platform/tbtools.git",            version: 0.2.1 }
-  tech_cells_generic:          { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.3 }
+  tech_cells_generic:          { git: "https://github.com/pulp-platform/tech_cells_generic.git", rev: 8149cde } # branch fc/verilator
   pulpissimo_padframe_rtl_sim: { path: "hw/padframe/pulpissimo_padframe_rtl_sim_autogen" }
   pulpissimo_padframe_fpga:    { path: "hw/padframe/pulpissimo_padframe_fpga_autogen" }
   register_interface:          { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.1 }
   generic_FLL:                 { git: "https://github.com/pulp-platform/generic_FLL.git",        version: 0.2.0 }
   apb_fll_if:                  { git: "https://github.com/pulp-platform/apb_fll_if.git",         version: 0.2.1 }
+  # the following dependencies are non-free, and will be ignored in a free setup
+  tech_cells_gf22fdx:          { path: "target/synthesis/bender/tech_cells" }
+  pulpissimo_essentials:       { path: "target/synthesis/bender/pulpissimo_essentials" }
 
 
   # Target Specific Dependencies
@@ -66,7 +69,25 @@ sources:
       - hw/padframe/padframe_adapter.sv
       - hw/clock_gen_fpga.sv
 
-  - target: simulation
+  # For Verilator RTL simulation 
+  - target: verilator
+    files:
+      - hw/padframe/padframe_adapter.sv
+      - hw/clock_gen_verilator.sv
+      - target/sim/tb/tb_lib/riscv_pkg.sv
+      - target/sim/tb/tb_lib/jtag_pkg.sv
+      - target/sim/tb/tb_lib/pulp_tap_pkg.sv
+      - target/sim/tb/tb_lib/tb_clk_gen.sv
+      - target/sim/tb/tb_lib/SimJTAG.sv
+      - target/sim/tb/tb_pulp.sv
+
+  # For Verilator RTL simulation 
+  - target: verilator_dpi
+    files:
+      - target/sim/tb/tb_lib/remote_bitbang/sim_jtag.c
+      - target/sim/tb/tb_lib/remote_bitbang/remote_bitbang.c
+
+  - target: all(simulation, not(verilator))
     files:
       - target/sim/tb/tb_lib/riscv_pkg.sv
       - target/sim/tb/tb_lib/jtag_pkg.sv
@@ -78,7 +99,6 @@ sources:
       - target/sim/tb/tb_pulp.sv
       - target/sim/tb/tb_pulp_simple.sv
 
-
 vendor_package:
   # Import the GPIO repository directly. Since we have to regenerate the RTL
   # when we change the number GPIOs we cannot just depend on it as a regular

Makefile

@@ -13,7 +13,12 @@
 # limitations under the License.
 #
 # Author: Manuel Eggimann
-
+# Check if bender is in PATH; if yes, use it; if not, use $(PULPISSIMO_UTILS)/bender
+ifeq (, $(shell which bender 2>/dev/null))
+	BENDER ?= $(PULPISSIMO_UTILS)/bender
+else
+	BENDER ?= bender
+endif
 mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
 current_dir := $(notdir $(patsubst %/,%,$(dir $(mkfile_path))))
 PULPISSIMO_ROOT=$(abspath $(current_dir)/..)
@@ -23,14 +28,23 @@ ifneq (,$(wildcard /etc/iis.version))
 endif
 
 include target/sim/questasim/Makefile
+include target/sim/verilator/Makefile
 include target/lint/spyglass/Makefile
 include target/fpga/Makefile
 include $(PULPISSIMO_ROOT)/utils/utils.mk
 
+# ignore synthesis targets if only free setup available
+-include target/synthesis/Makefile
+
 .PHONY: checkout
 ## Checkout all Bender IPs
 checkout: $(PULPISSIMO_UTILS)/bender
-	$(PULPISSIMO_UTILS)/bender checkout
+	$(BENDER) checkout
+
+.PHONY: checkout-synthesis
+checkout-synthesis: $(PULPISSIMO_UTILS)/bender
+	git clone --recursive [email protected]:pulp-restricted/pulpissimo-synthesis target/synthesis
+	$(BENDER) update
 
 .PHONY: hw bootrom padframe
 ## Re-generate generated hardware IPs