Skip to content
This repository was archived by the owner on Jun 27, 2024. It is now read-only.

Interrupt Descriptors Table #26

Open
wants to merge 4 commits into
base: main
Choose a base branch
from
Open

Conversation

FedorLap2006
Copy link

This PR adds the basic explanation and specs of IDT.
It's my first PR, edits from maintainers are welcome.

@lukflug
Copy link
Member

lukflug commented May 31, 2022

Compare with #15

Copy link
Member

@lukflug lukflug left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

There are a couple of grammatical issues with this (which isn't surprising, since it was ripped off the osdev.org wiki, which is why I don't recommend taking stuff from there to build this wiki, even though it is public domain).
In any case, this cites zero sources.

pages/idt.adoc Outdated
If CPU was running in 32-bit mode, and the selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point. To return back to 32-bit mode `o32 iret` instruction should be used, otherwise CPU would not know how to perform a 32-bit return (reading 32-bit instead of 16-bit values from the stack).

==== Trap Gate
Trap gate is similar to Interrupt Gate. It is commonly used for syscalls and exceptions. The difference is that for a Trap Gate CPU does not disable hardware interrupts, while upon entering Interrupt Gate CPU automatically disables hardware interrupts and reenables them on return.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"The difference is that, for a trap gate, the CPU does not change the interrupt flag, while, upon entering an interrupt gate, the CPU automatically clears the interrupt flag. The CPU automatically restores the previous state of the interrupt flag upon returning from an interrupt for both interrupt gates and task gates."
The claim that it is commonly used for syscalls and exceptions needs more verification.
It might also be a good idea to further specify the concept of "enabling/disabling hardware interrupts", by replacing it by "setting/clearing the interrupt flag".
In addition, the CPU does not set the interrupt flag when returning from an interrupt gate, it restores the previous state of the interrupt flag from the stack for a interrupt gate and task gate.

pages/idt.adoc Outdated
Comment on lines 168 to 169
In a Task Gate the *Selector* value should refer to a position in the GDT which specifies a Task
State Segment rather than a code segment, and the *Offset* value is unused and should be set to zero.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"selector" and "offset" are probably lower case.
Also, don't make them bold.
Use bold to highlight important terms as they are introduced.
To emphasize something, use italics.

pages/idt.adoc Outdated
In a Task Gate the *Selector* value should refer to a position in the GDT which specifies a Task
State Segment rather than a code segment, and the *Offset* value is unused and should be set to zero.

When processing this interrupt, the CPU it will perform a hardware task switch to the specified task, rather than jumping to an ISR. A pointer back to the task which was interrupted will be stored in the Task Link field in TSS.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"task link field" is probably lower case

Copy link
Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Link in this case means a field in the TSS. I decided to specifically capitalize it.

@FedorLap2006 FedorLap2006 requested review from pitust and lukflug June 1, 2022 11:23
|===


// TODO: x86_64
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Add x86_64 stuff here

Copy link
Contributor

@pitust pitust left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

There is no mention of lidt here

Copy link
Member

@lukflug lukflug left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Why does every sentence in the gate type section start a new paragraph.
This article still cites no sources.
The short description is also wrong.


// TODO: articles "GDT" and "Interrupts" are not written yet

Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Add "the" or "an".

// TODO: articles "GDT" and "Interrupts" are not written yet

Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.
It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"interrupt service routine" singular


Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.
It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.
It is protected mode and long mode counterpart to real mode interrupt vector table (IVT).
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"the protected mode and long mode counterpart"

It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.
It is protected mode and long mode counterpart to real mode interrupt vector table (IVT).

IMPORTANT: IDT requires a working xref:gdt[GDT]
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

add "an" or "the"

|===

==== Things to know
* IDT can contain up to 256 (0..255) ISR vectors. Entries above this limit will be ignored.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"the" or "an"


IMPORTANT: Usage of 16-bit gates is highly unadvised, as the CPU cannot properly return to 32-bit mode using `iret`.

If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"protected mode is lower case"
also, this does not take compatibility mode into account

@@ -0,0 +1,142 @@
---
title: Interrupt descriptor table
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

inconsistent capitalization

|===

==== Interrupt Gate
An interrupt gate is used to indicate an interrupt service routine (ISR).
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

maybe there is a better verb than "indicate"

| 32-bit trap gate
|===

==== Interrupt Gate
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

section headers are sentence case


If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.

==== Trap Gate
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

see previous comment

Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants