UCT/IB/MLX5/RC: Avoid caching AH for DevX RoCE QP connect - #11828
UCT/IB/MLX5/RC: Avoid caching AH for DevX RoCE QP connect#11828tvegas1 wants to merge 3 commits into
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🤖 Starting review — findings will be posted here when done. |
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Minor consistency note: the warn-on-failure pattern for ibv_destroy_ah is new here — elsewhere it's called without a check (e.g. uct_ib_device_test_roce_gid_index and cache cleanup). Warning on failure is reasonable and matches uct_ib_destroy_cq, so not a concern. Minor (non-blocking): the ret value passed into ucs_warn("... returned %d: %m", ret) is redundant with %m (both convey the errno), but this mirrors existing style (uct_ib_device_query's ibv_query_port warning), so it's fine as-is. Test coverage note: this is a behavioral change on the RoCE devx QP-connect path (AH is now transient rather than cached). It relies on existing RoCE + devx connection-establishment coverage rather than a new focused test. Worth confirming the CI matrix includes a RoCE + devx job so the transient-AH create/destroy path is actually run. |
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🤖 CI Triage Agent — TL;DR: The gtest suite passed completely (8609/8609); the job failed only on a LeakSanitizer report of a 131-byte glibc-internal Full analysisSummary: Root cause: The leaked block is allocated inside glibc itself, not UCX:
Critically, the Implicated commit: Not PR #11828. The leaking line predates it ( File: Suggested fix:
Related: PR #11828 (the PR under test — unaffected); PR #11206 (added external plugin loading + last |
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🤖 Starting review — findings will be posted here when done. |
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Residual coverage gap (already flagged in prior review): this is a behavioral change on the RoCE + devx QP-connect path relying on existing connection-establishment coverage; worth confirming a RoCE + devx CI job actually exercises the transient create/destroy path. |
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🤖 Starting review — findings will be posted here when done. |
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🤖 Review complete — no issues found. |
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🤖 CI Triage Agent — TL;DR: The Full analysisSummary: Root cause: Evidence chain from the log:
The UMR QP self-connect is RoCE-fragile: PR #11828 ( Implicated commit: unknown for the UMR failure (UMR export path predates this PR; most recent touches: a956862 "UCT/IB: Support relaxed-only memory keys" by Roie Danino, a47066b by Raul Akhmetshin). PR head 6f4fb0c (Thomas Vegas) is not implicated by the log evidence. File: src/uct/ib/mlx5/dv/ib_mlx5dv_md.c:1441-1448 (30 s UMR poll timeout) and :1218-1227 (UMR QP RoCE AH attrs, hardcoded GID index 0); test/gtest/ucp/ucp_test.cc:917-921 (deadline-less teardown loop) Suggested fix:
Related: PR #11828 (the branch under test); #11433 (previous work on this test); UMR/mkey changes #11649 |
What?
RC's DevX (mlx5) RoCE QP connect no longer uses the iface-wide cached address handle (AH). It creates a temporary, uncached AH just to extract the AV bytes needed for the QP context, then destroys it right away.
Why?
The cached AH is keyed by resolved LID/GID and has no reliable invalidation path, so a peer's stale, no-longer-valid L2 address could keep being reused. The AH is only needed transiently here, to read its AV bytes into the QP context.
How?
uct_rc_mlx5_iface_common_devx_connect_qp()now creates the AH on RoCE and destroys it immediately after extracting the AV bytes, instead of going through AH cache. The fix covers every caller: RC (Vebs unaffected), GDAKI, GGA, and the internal tag-matching command QP.