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Merge branch 'master' into scp-async-check
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@bscottm
bscottm authored Feb 8, 2024
2 parents ff11516 + 1a1396d commit c28c074
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Showing 58 changed files with 3,593 additions and 801 deletions.
16 changes: 15 additions & 1 deletion .travis/deps.sh
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Expand Up @@ -45,8 +45,22 @@ install_ucrt64() {
mingw-w64-ucrt-x86_64-libpcap
}

install_clang64() {
pacman -S --needed mingw-w64-clang-x86_64-ninja \
mingw-w64-clang-x86_64-cmake \
mingw-w64-clang-x86_64-extra-cmake-modules \
mingw-w64-clang-x86_64-clang \
mingw-w64-clang-x86_64-make \
mingw-w64-clang-x86_64-pcre \
mingw-w64-clang-x86_64-freetype \
mingw-w64-clang-x86_64-SDL2 \
mingw-w64-clang-x86_64-SDL2_ttf \
mingw-w64-clang-x86_64-libpcap
}


case "$1" in
osx|linux|mingw64|ucrt64)
osx|linux|mingw64|ucrt64|clang64)
install_"$1"
;;
*)
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4 changes: 2 additions & 2 deletions 3B2/3b2_dmac.c
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Expand Up @@ -185,15 +185,15 @@ uint32 dmac_read(uint32 pa, size_t size)
break;
default:
sim_debug(READ_MSG, &dmac_dev,
"DMAC READ %lu B @ %08x\n",
"DMAC READ %" SIZE_T_FMT "u B @ %08x\n",
size, pa);
data = 0;
}

return data;
default:
sim_debug(READ_MSG, &dmac_dev,
"[BASE: %08x] DMAC READ %lu B @ %08x\n",
"[BASE: %08x] DMAC READ %" SIZE_T_FMT "u B @ %08x\n",
base, size, pa);
return 0;
}
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2 changes: 2 additions & 0 deletions 3B2/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@ add_simulator(3b2
DEFINES
REV2
FEATURE_FULL64
USES_AIO
LABEL 3B2
PKG_FAMILY att3b2_family
TEST 3b2)
Expand Down Expand Up @@ -65,6 +66,7 @@ add_simulator(3b2-700
DEFINES
REV3
FEATURE_FULL64
USES_AIO
LABEL 3B2
PKG_FAMILY att3b2_family
TEST 3b2-700)
1 change: 1 addition & 0 deletions AltairZ80/CMakeLists.txt
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Expand Up @@ -18,6 +18,7 @@ add_simulator(altairz80
SOURCES
altairz80_cpu.c
altairz80_cpu_nommu.c
s100_jair.c
sol20.c
s100_vdm1.c
mmd.c
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75 changes: 52 additions & 23 deletions AltairZ80/altairz80_cpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -164,12 +164,14 @@ static t_stat cpu_set_nonbanked (UNIT *uptr, int32 value, CONST char *cptr,
static t_stat cpu_set_ramtype (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_chiptype (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_size (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat set_size (uint32 size, t_bool unmap);
static t_stat m68k_set_chiptype (UNIT * uptr, int32 value, CONST char* cptr, void* desc);
static t_stat cpu_set_memory (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_resize_memory (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static t_stat cpu_set_hist (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
static t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
static t_stat cpu_clear_command (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
static void cpu_clear(void);
static void cpu_clear(t_bool unmap);
static t_stat cpu_show (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
static t_stat chip_show (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
static t_stat cpu_ex(t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
Expand Down Expand Up @@ -536,13 +538,15 @@ static MTAB cpu_mod[] = {
{ UNIT_CPU_VERBOSE, 0, "QUIET", "QUIET", NULL, NULL,
NULL, "Disable verbose messages" },
{ MTAB_VDV, 0, NULL, "CLEARMEMORY", &cpu_clear_command,
NULL, NULL, "Clears the RAM" },
NULL, NULL, "Clears the RAM and removes mapped memory handlers" },
{ UNIT_CPU_MMU, UNIT_CPU_MMU, "MMU", "MMU", NULL, NULL,
NULL, "Enable the Memory Management Unit for 8080 / Z80" },
{ UNIT_CPU_MMU, 0, "NOMMU", "NOMMU", &cpu_set_nommu,
NULL, NULL, "Disable the Memory Management Unit for 8080 / Z80" },
{ MTAB_XTD | MTAB_VDV, 0, NULL, "MEMORY", &cpu_set_memory,
NULL, NULL, "Sets the RAM size for 8080 / Z80 / 8086" },
{ MTAB_XTD | MTAB_VDV | MTAB_VALR, 0, NULL, "MEMORY", &cpu_set_memory,
NULL, NULL, "Sets the RAM size and removes mapped memory handlers for 8080 / Z80 / 8086" },
{ MTAB_XTD | MTAB_VDV | MTAB_VALR, 0, NULL, "RESIZEMEMORY", &cpu_resize_memory,
NULL, NULL, "Sets the RAM size without removing mapped memory handlers for 8080 / Z80 / 8086" },
{ UNIT_CPU_SWITCHER, UNIT_CPU_SWITCHER, "SWITCHER", "SWITCHER", &cpu_set_switcher, &cpu_show_switcher,
NULL, "Sets CPU switcher port for 8080 / Z80 / 8086" },
{ UNIT_CPU_SWITCHER, 0, "NOSWITCHER", "NOSWITCHER", &cpu_reset_switcher, &cpu_show_switcher,
Expand Down Expand Up @@ -6700,22 +6704,27 @@ static t_stat cpu_show(FILE *st, UNIT *uptr, int32 val, CONST void *desc) {
return SCPE_OK;
}

static void cpu_clear(void) {
static void cpu_clear(t_bool unmap) {
uint32 i;
for (i = 0; i < MAXMEMORY; i++)
M[i] = 0;
for (i = 0; i < (MAXMEMORY >> LOG2PAGESIZE); i++)
mmu_table[i] = RAM_PAGE;
if (!mmu_table[i].routine || unmap) {
if (mmu_table[i].routine && (cpu_unit.flags & UNIT_CPU_VERBOSE))
sim_printf("Unmapping memory 0x%05x, handler=%s\n", i << LOG2PAGESIZE, mmu_table[i].name);
mmu_table[i] = RAM_PAGE;
}
for (i = (MEMORYSIZE >> LOG2PAGESIZE); i < (MAXMEMORY >> LOG2PAGESIZE); i++)
mmu_table[i] = EMPTY_PAGE;
if (!mmu_table[i].routine || unmap)
mmu_table[i] = EMPTY_PAGE;
if (cpu_unit.flags & UNIT_CPU_ALTAIRROM)
install_ALTAIRbootROM();
m68k_clear_memory();
clockHasChanged = FALSE;
}

static t_stat cpu_clear_command(UNIT *uptr, int32 value, CONST char *cptr, void *desc) {
cpu_clear();
cpu_clear(TRUE);
return SCPE_OK;
}

Expand Down Expand Up @@ -6754,7 +6763,7 @@ static t_stat cpu_set_banked(UNIT *uptr, int32 value, CONST char *cptr, void *de
previousCapacity = MEMORYSIZE;
MEMORYSIZE = MAXMEMORY;
cpu_dev.awidth = MAXBANKSIZELOG2 + MAXBANKSLOG2;
cpu_clear();
cpu_clear(TRUE);
} else if (chiptype == CHIP_TYPE_8086) {
sim_printf("Cannot use banked memory for 8086 CPU.\n");
return SCPE_ARG;
Expand All @@ -6766,7 +6775,7 @@ static t_stat cpu_set_nonbanked(UNIT *uptr, int32 value, CONST char *cptr, void
if ((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) {
MEMORYSIZE = previousCapacity;
cpu_dev.awidth = MAXBANKSIZELOG2;
cpu_clear();
cpu_clear(TRUE);
}
return SCPE_OK;
}
Expand Down Expand Up @@ -6904,7 +6913,7 @@ static void cpu_set_chiptype_short(const int32 value) {

static t_stat cpu_set_chiptype(UNIT *uptr, int32 value, CONST char *cptr, void *desc) {
cpu_set_chiptype_short(value);
cpu_clear();
cpu_clear(TRUE);
return SCPE_OK;
}

Expand Down Expand Up @@ -7037,7 +7046,7 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, CONST char *cptr, void *d
}

/* set memory to 'size' kilo byte */
static t_stat set_size(uint32 size) {
static t_stat set_size(uint32 size, t_bool unmap) {
uint32 maxsize;
if (chiptype == CHIP_TYPE_M68K) { // ignore for M68K
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
Expand All @@ -7059,23 +7068,40 @@ static t_stat set_size(uint32 size) {
cpu_dev.awidth = MAXBANKSIZELOG2;
if (size > MAXBANKSIZE)
cpu_dev.awidth += MAXBANKSLOG2;
cpu_clear();
cpu_clear(unmap);
return SCPE_OK;
}

static t_stat cpu_set_size(UNIT *uptr, int32 value, CONST char *cptr, void *desc) {
return set_size(value);
return set_size(value, TRUE);
}

static t_stat cpu_set_memory(UNIT *uptr, int32 value, CONST char *cptr, void *desc) {
uint32 size, result, i;
if (cptr == NULL)
return SCPE_ARG;
if (cptr == NULL) {
sim_printf("Memory size must be provided as SET CPU MEMORY=xK\n");
return SCPE_ARG | SCPE_NOMESSAGE;
}
result = sscanf(cptr, "%i%n", &size, &i);
if ((result == 1) && (cptr[i] == 'K') && ((cptr[i + 1] == 0) ||
((cptr[i + 1] == 'B') && (cptr[i + 2] == 0))))
return set_size(size);
return SCPE_ARG;
return set_size(size, TRUE);
sim_printf("Memory size must be specified as xK\n");
return SCPE_ARG | SCPE_NOMESSAGE;
}

static t_stat cpu_resize_memory(UNIT *uptr, int32 value, CONST char *cptr, void *desc) {
uint32 size, result, i;
if (cptr == NULL) {
sim_printf("Memory size must be provided as SET CPU RESIZEMEMORY=xK\n");
return SCPE_ARG | SCPE_NOMESSAGE;
}
result = sscanf(cptr, "%i%n", &size, &i);
if ((result == 1) && (cptr[i] == 'K') && ((cptr[i + 1] == 0) ||
((cptr[i + 1] == 'B') && (cptr[i + 2] == 0))))
return set_size(size, FALSE);
sim_printf("Memory size must be specified as xK\n");
return SCPE_ARG | SCPE_NOMESSAGE;
}

static t_stat m68k_set_chiptype(UNIT* uptr, int32 value, CONST char* cptr, void* desc) {
Expand Down Expand Up @@ -7233,7 +7259,7 @@ t_value altairz80_pc_value (void) {

/* AltairZ80 Simulator initialization */
void altairz80_init(void) {
cpu_clear();
cpu_clear(TRUE);
sim_vm_pc_value = &altairz80_pc_value;
/* altairz80_print_tables(); */
}
Expand Down Expand Up @@ -7430,10 +7456,13 @@ static t_addr disp_addr = 0;

static t_stat cpu_cmd_memory(int32 flag, const char *cptr) {
char abuf[16];
t_addr lo, hi, last;
t_addr lo, hi, max, last;
t_value byte;

if (get_range(NULL, cptr, &lo, &hi, 16, MEMORYMASK, 0) == NULL) {
/* 64K minimum */
max = (MEMORYMASK < 0xffff) ? 0xffff : MEMORYMASK;

if (get_range(NULL, cptr, &lo, &hi, 16, max, 0) == NULL) {
lo = hi = disp_addr;
}
else {
Expand All @@ -7446,7 +7475,7 @@ static t_stat cpu_cmd_memory(int32 flag, const char *cptr) {

last = hi | 0x00000f;

while (disp_addr <= last && disp_addr <= MEMORYMASK) {
while (disp_addr <= last && disp_addr <= max) {

if (!(disp_addr & 0x0f)) {
if (MEMORYSIZE <= 0x10000) {
Expand Down Expand Up @@ -7474,7 +7503,7 @@ static t_stat cpu_cmd_memory(int32 flag, const char *cptr) {
disp_addr++;
}

if (disp_addr > MEMORYMASK) {
if (disp_addr > max) {
disp_addr = 0;
}

Expand Down
9 changes: 9 additions & 0 deletions AltairZ80/altairz80_sys.c
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Original file line number Diff line number Diff line change
Expand Up @@ -79,6 +79,10 @@ extern DEVICE m2sio0_dev;
extern DEVICE m2sio1_dev;
extern DEVICE pmmi_dev;
extern DEVICE hayes_dev;
extern DEVICE jair_dev;
extern DEVICE jairs0_dev;
extern DEVICE jairs1_dev;
extern DEVICE jairp_dev;
extern DEVICE mmd_dev;
extern DEVICE mmdm_dev;
extern DEVICE sol20_dev;
Expand Down Expand Up @@ -171,6 +175,11 @@ DEVICE *sim_devices[] = {
&pmmi_dev,
/* HAYES MODEM */
&hayes_dev,
/* JAIR SBC */
&jair_dev,
&jairs0_dev,
&jairs1_dev,
&jairp_dev,
/* Vector Graphic Devices */
&fw2_dev, &vfdhd_dev,
/* Single-Board Computers */
Expand Down
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