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[FIRRTL] Add a bind op (#8384)
Currently, FIRRTL instances may be marked as "lowerToBind", which is then lowered to a HW instance marked "doNotPrint", along with a bind op in the global scope. This PR adds a bind op to FIRRTL, which in conjunction with the "doNotPrint" flag on FIRRTL instances, allows us to choose precisely where the bind operation goes, rather than having lowerToHW choose for us.
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6 files changed

+142
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‎include/circt/Dialect/FIRRTL/FIRRTLStatements.td

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Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ include "FIRRTLDialect.td"
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include "FIRRTLEnums.td"
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include "FIRRTLOpInterfaces.td"
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include "FIRRTLTypes.td"
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include "circt/Dialect/HW/HWAttributesNaming.td"
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include "circt/Dialect/HW/HWTypes.td"
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include "mlir/IR/SymbolInterfaces.td"
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include "mlir/Interfaces/SideEffectInterfaces.td"
@@ -428,4 +429,27 @@ def LayerBlockOp : FIRRTLOp<
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let hasCanonicalizeMethod = 1;
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}
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//===----------------------------------------------------------------------===//
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// Bind Op
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//===----------------------------------------------------------------------===//
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def BindOp
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: FIRRTLOp<"bind", [DeclareOpInterfaceMethods<InnerRefUserOpInterface>]> {
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let summary = "Indirect instantiation statement";
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let description = [{
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Indirectly instantiate a module from the context of another module. BindOp
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pairs with a `firrtl.instance` which tracks all information except the
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emission point for the bind.
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This op exists to aid in the progressive lowering of FIRRTL surface level
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constructs, such as layers, to system verilog (sv dialect).
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}];
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let arguments = (ins InnerRefAttr:$instance);
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let assemblyFormat = "$instance attr-dict";
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let builders = [OpBuilder<(ins "StringAttr":$mod, "StringAttr":$name), [{
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auto instance = hw::InnerRefAttr::get(mod, name);
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build(odsBuilder, odsState, instance);
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}]>];
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}
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#endif // CIRCT_DIALECT_FIRRTL_FIRRTLSTATEMENTS_TD

‎include/circt/Dialect/FIRRTL/FIRRTLVisitors.h

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -241,17 +241,17 @@ class StmtVisitor {
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ResultType dispatchStmtVisitor(Operation *op, ExtraArgs... args) {
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auto *thisCast = static_cast<ConcreteType *>(this);
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return TypeSwitch<Operation *, ResultType>(op)
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.template Case<
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AttachOp, ConnectOp, MatchingConnectOp, RefDefineOp, ForceOp,
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PrintFOp, FPrintFOp, SkipOp, StopOp, WhenOp, AssertOp, AssumeOp,
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CoverOp, PropAssignOp, RefForceOp, RefForceInitialOp, RefReleaseOp,
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RefReleaseInitialOp, FPGAProbeIntrinsicOp, VerifAssertIntrinsicOp,
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VerifAssumeIntrinsicOp, UnclockedAssumeIntrinsicOp,
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VerifCoverIntrinsicOp, VerifRequireIntrinsicOp,
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VerifEnsureIntrinsicOp, LayerBlockOp, MatchOp, ViewIntrinsicOp>(
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[&](auto opNode) -> ResultType {
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return thisCast->visitStmt(opNode, args...);
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})
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.template Case<AttachOp, ConnectOp, MatchingConnectOp, RefDefineOp,
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ForceOp, PrintFOp, FPrintFOp, SkipOp, StopOp, WhenOp,
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AssertOp, AssumeOp, CoverOp, PropAssignOp, RefForceOp,
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RefForceInitialOp, RefReleaseOp, RefReleaseInitialOp,
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FPGAProbeIntrinsicOp, VerifAssertIntrinsicOp,
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VerifAssumeIntrinsicOp, UnclockedAssumeIntrinsicOp,
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VerifCoverIntrinsicOp, VerifRequireIntrinsicOp,
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VerifEnsureIntrinsicOp, LayerBlockOp, MatchOp,
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ViewIntrinsicOp, BindOp>([&](auto opNode) -> ResultType {
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return thisCast->visitStmt(opNode, args...);
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})
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.Default([&](auto expr) -> ResultType {
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return thisCast->visitInvalidStmt(op, args...);
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});
@@ -302,6 +302,7 @@ class StmtVisitor {
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HANDLE(LayerBlockOp);
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HANDLE(MatchOp);
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HANDLE(ViewIntrinsicOp);
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HANDLE(BindOp);
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#undef HANDLE
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};

‎lib/Conversion/FIRRTLToHW/LowerToHW.cpp

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@@ -577,6 +577,7 @@ struct FIRRTLModuleLowering
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CircuitLoweringState &loweringState);
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LogicalResult lowerSimulationBody(verif::SimulationOp simulationOp,
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CircuitLoweringState &loweringState);
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LogicalResult lowerFileBody(emit::FileOp op);
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LogicalResult lowerBody(Operation *op, CircuitLoweringState &loweringState);
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};
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@@ -692,6 +693,11 @@ void FIRRTLModuleLowering::runOnOperation() {
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opsToProcess.push_back(newOp);
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return success();
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})
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.Case<emit::FileOp>([&](auto fileOp) {
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fileOp->moveBefore(topLevelModule, topLevelModule->end());
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opsToProcess.push_back(fileOp);
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return success();
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})
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.Default([&](Operation *op) {
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// We don't know what this op is. If it has no illegal FIRRTL
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// types, we can forward the operation. Otherwise, we emit an
@@ -1851,6 +1857,7 @@ struct FIRRTLLowering : public FIRRTLVisitor<FIRRTLLowering, LogicalResult> {
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LogicalResult visitStmt(RefForceInitialOp op);
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LogicalResult visitStmt(RefReleaseOp op);
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LogicalResult visitStmt(RefReleaseInitialOp op);
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LogicalResult visitStmt(BindOp op);
18541861

18551862
FailureOr<Value> lowerSubindex(SubindexOp op, Value input);
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FailureOr<Value> lowerSubaccess(SubaccessOp op, Value input);
@@ -1966,6 +1973,18 @@ FIRRTLModuleLowering::lowerModuleBody(hw::HWModuleOp module,
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return FIRRTLLowering(module, loweringState).run();
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}
19681975

1976+
LogicalResult FIRRTLModuleLowering::lowerFileBody(emit::FileOp fileOp) {
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OpBuilder b(&getContext());
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fileOp->walk([&](Operation *op) {
1979+
if (auto bindOp = dyn_cast<BindOp>(op)) {
1980+
b.setInsertionPointAfter(bindOp);
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b.create<sv::BindOp>(bindOp.getLoc(), bindOp.getInstanceAttr());
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bindOp->erase();
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}
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});
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return success();
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}
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LogicalResult
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FIRRTLModuleLowering::lowerBody(Operation *op,
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CircuitLoweringState &loweringState) {
@@ -1975,6 +1994,8 @@ FIRRTLModuleLowering::lowerBody(Operation *op,
19751994
return lowerFormalBody(formalOp, loweringState);
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if (auto simulationOp = dyn_cast<verif::SimulationOp>(op))
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return lowerSimulationBody(simulationOp, loweringState);
1997+
if (auto fileOp = dyn_cast<emit::FileOp>(op))
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return lowerFileBody(fileOp);
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return failure();
19792000
}
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@@ -5165,6 +5186,11 @@ LogicalResult FIRRTLLowering::visitStmt(AttachOp op) {
51655186
return success();
51665187
}
51675188

5189+
LogicalResult FIRRTLLowering::visitStmt(BindOp op) {
5190+
builder.create<sv::BindOp>(op.getInstanceAttr());
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return success();
5192+
}
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51685194
LogicalResult FIRRTLLowering::fixupLTLOps() {
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if (ltlOpFixupWorklist.empty())
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return success();

‎lib/Dialect/FIRRTL/FIRRTLOps.cpp

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@@ -6404,6 +6404,29 @@ void HierarchicalModuleNameOp::getAsmResultNames(
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setNameFn(getResult(), "hierarchicalmodulename");
64056405
}
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//===----------------------------------------------------------------------===//
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// BindOp
6409+
//===----------------------------------------------------------------------===//
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LogicalResult BindOp::verifyInnerRefs(hw::InnerRefNamespace &ns) {
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auto ref = getInstanceAttr();
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auto target = ns.lookup(ref);
6414+
if (!target)
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return emitError() << "target " << ref << " cannot be resolved";
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6417+
if (!target.isOpOnly())
6418+
return emitError() << "target " << ref << " is not an operation";
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6420+
auto instance = dyn_cast<InstanceOp>(target.getOp());
6421+
if (!instance)
6422+
return emitError() << "target " << ref << " is not an instance";
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6424+
if (!instance.getDoNotPrint())
6425+
return emitError() << "target " << ref << " is not marked doNotPrint";
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6427+
return success();
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}
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//===----------------------------------------------------------------------===//
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// TblGen Generated Logic.
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//===----------------------------------------------------------------------===//

‎test/Conversion/FIRRTLToHW/lower-to-hw.mlir

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@@ -725,6 +725,23 @@ firrtl.circuit "Simple" attributes {annotations = [{class =
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firrtl.instance foo {doNotPrint} @foo()
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}
727727

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// Check that explicit bind ops are lowered to sv.bind, even if they are
729+
// buried in an emit block.
730+
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firrtl.module @BoundModule() {}
732+
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// CHECK-LABEL: hw.module @ExplicitBindTest()
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firrtl.module @ExplicitBindTest() {
735+
// CHECK: hw.instance "boundInstance" sym @boundInstance @BoundModule() -> () {doNotPrint}
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firrtl.instance boundInstance sym @boundInstance {doNotPrint} @BoundModule()
737+
}
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// CHECK: emit.file "some-file.sv"
740+
emit.file "some-file.sv" {
741+
// CHECK: sv.bind <@ExplicitBindTest::@boundInstance>
742+
firrtl.bind <@ExplicitBindTest::@boundInstance>
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}
744+
728745
// CHECK-LABEL: hw.module private @attributes_preservation
729746
// CHECK-SAME: firrtl.foo = "bar"
730747
// CHECK-SAME: output_file = #hw.output_file<"output_fileTest.sv", excludeFromFileList>

‎test/Dialect/FIRRTL/errors.mlir

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@@ -2885,3 +2885,43 @@ firrtl.circuit "SimulationPortType3" {
28852885
out success: !firrtl.reset
28862886
)
28872887
}
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// -----
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2891+
firrtl.circuit "BindTargetMissingModule" {
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firrtl.module @BindTargetMissing() {}
2893+
// expected-error @below {{target #hw.innerNameRef<@XXX::@YYY> cannot be resolved}}
2894+
firrtl.bind <@XXX::@YYY>
2895+
}
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// -----
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2899+
firrtl.circuit "BindTargetMissingInstance" {
2900+
firrtl.module @BindTargetMissingInstance() {}
2901+
// expected-error @below {{target #hw.innerNameRef<@BindTargetMissingInstance::@YYY> cannot be resolved}}
2902+
firrtl.bind <@BindTargetMissingInstance::@YYY>
2903+
}
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2905+
// -----
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2907+
firrtl.circuit "BindTargetNotAnInstance" {
2908+
firrtl.module @Target() {}
2909+
firrtl.module @BindTargetMissingDoNotPrintFlag() {
2910+
%wire = firrtl.wire sym @target : !firrtl.uint<8>
2911+
}
2912+
2913+
// expected-error @below {{target #hw.innerNameRef<@BindTargetMissingDoNotPrintFlag::@target> is not an instance}}
2914+
firrtl.bind <@BindTargetMissingDoNotPrintFlag::@target>
2915+
}
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2917+
// -----
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2919+
firrtl.circuit "BindTargetMissingDoNotPrintFlag" {
2920+
firrtl.module @Target() {}
2921+
firrtl.module @BindTargetMissingDoNotPrintFlag() {
2922+
firrtl.instance target sym @target @Target()
2923+
}
2924+
2925+
// expected-error @below {{target #hw.innerNameRef<@BindTargetMissingDoNotPrintFlag::@target> is not marked doNotPrint}}
2926+
firrtl.bind <@BindTargetMissingDoNotPrintFlag::@target>
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}

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