[FIRRTL][LowerToHW] Lower firrtl.bind ops under emit.file ops

Author: rwy7

lib/Conversion/FIRRTLToHW/LowerToHW.cpp

@@ -576,6 +576,7 @@ struct FIRRTLModuleLowering
                                 CircuitLoweringState &loweringState);
   LogicalResult lowerSimulationBody(verif::SimulationOp simulationOp,
                                     CircuitLoweringState &loweringState);
+  LogicalResult lowerFileBody(emit::FileOp op);
   LogicalResult lowerBody(Operation *op, CircuitLoweringState &loweringState);
 };
 
@@ -691,6 +692,11 @@ void FIRRTLModuleLowering::runOnOperation() {
               opsToProcess.push_back(newOp);
               return success();
             })
+            .Case<emit::FileOp>([&](auto fileOp) {
+              fileOp->moveBefore(topLevelModule, topLevelModule->end());
+              opsToProcess.push_back(fileOp);
+              return success();
+            })
             .Default([&](Operation *op) {
               // We don't know what this op is.  If it has no illegal FIRRTL
               // types, we can forward the operation.  Otherwise, we emit an
@@ -1779,6 +1785,7 @@ struct FIRRTLLowering : public FIRRTLVisitor<FIRRTLLowering, LogicalResult> {
   LogicalResult visitStmt(RefForceInitialOp op);
   LogicalResult visitStmt(RefReleaseOp op);
   LogicalResult visitStmt(RefReleaseInitialOp op);
+  LogicalResult visitStmt(BindOp op);
 
   FailureOr<Value> lowerSubindex(SubindexOp op, Value input);
   FailureOr<Value> lowerSubaccess(SubaccessOp op, Value input);
@@ -1891,6 +1898,18 @@ FIRRTLModuleLowering::lowerModuleBody(hw::HWModuleOp module,
   return FIRRTLLowering(module, loweringState).run();
 }
 
+LogicalResult FIRRTLModuleLowering::lowerFileBody(emit::FileOp fileOp) {
+  OpBuilder b(&getContext());
+  fileOp->walk([&](Operation *op) {
+    if (auto bindOp = dyn_cast<BindOp>(op)) {
+      b.setInsertionPointAfter(bindOp);
+      b.create<sv::BindOp>(bindOp.getLoc(), bindOp.getInstanceAttr());
+      bindOp->erase();
+    }
+  });
+  return success();
+}
+
 LogicalResult
 FIRRTLModuleLowering::lowerBody(Operation *op,
                                 CircuitLoweringState &loweringState) {
@@ -1900,6 +1919,8 @@ FIRRTLModuleLowering::lowerBody(Operation *op,
     return lowerFormalBody(formalOp, loweringState);
   if (auto simulationOp = dyn_cast<verif::SimulationOp>(op))
     return lowerSimulationBody(simulationOp, loweringState);
+  if (auto fileOp = dyn_cast<emit::FileOp>(op))
+    return lowerFileBody(fileOp);
   return failure();
 }
 
@@ -5050,6 +5071,11 @@ LogicalResult FIRRTLLowering::visitStmt(AttachOp op) {
   return success();
 }
 
+LogicalResult FIRRTLLowering::visitStmt(BindOp op) {
+  builder.create<sv::BindOp>(op.getInstanceAttr());
+  return success();
+}
+
 LogicalResult FIRRTLLowering::fixupLTLOps() {
   if (ltlOpFixupWorklist.empty())
     return success();

test/Conversion/FIRRTLToHW/lower-to-hw.mlir

@@ -689,6 +689,23 @@ firrtl.circuit "Simple"   attributes {annotations = [{class =
     firrtl.instance foo {doNotPrint} @foo()
   }
 
+  // Check that explicit bind ops are lowered to sv.bind, even if they are
+  // buried in an emit block.
+
+  firrtl.module @BoundModule() {}
+
+  // CHECK-LABEL: hw.module @ExplicitBindTest()
+  firrtl.module @ExplicitBindTest() {
+    // CHECK: hw.instance "boundInstance" sym @boundInstance @BoundModule() -> () {doNotPrint}
+    firrtl.instance boundInstance sym @boundInstance {doNotPrint} @BoundModule()
+  }
+
+  // CHECK: emit.file "some-file.sv"
+  emit.file "some-file.sv" {
+    // CHECK: sv.bind <@ExplicitBindTest::@boundInstance>
+    firrtl.bind <@ExplicitBindTest::@boundInstance>
+  }
+
   // CHECK-LABEL: hw.module private @attributes_preservation
   // CHECK-SAME: firrtl.foo = "bar"
   // CHECK-SAME: output_file = #hw.output_file<"output_fileTest.sv", excludeFromFileList>