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[SYCL] disabling two test clauses while opening a JIRA #16699

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cperkinsintel
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to address post-commit failure here:
#16693

This fpga_pipe.cpp test has been passing because it was using the wrong binary operation to fold together test results. I fixed this in this and some other tests recently. My PR passed the CI because, apparently, we don't have exercise the FPGA accelerator (or emulator) there.

fpga_pipe.cpp tests 12 different combinations, the last two ( test_array_th_nb_pipe and test_array_th_bl_pipe ) are failing. Opening a JIRA.

@steffenlarsen steffenlarsen merged commit 903279c into intel:sycl Jan 21, 2025
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