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Add loongarch64 support #298

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2 changes: 2 additions & 0 deletions src/linux-context.h
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,8 @@ typedef ucontext_t hwd_ucontext_t;
#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.arm_pc
#elif defined(__aarch64__)
#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
#elif defined(__loongarch64)
#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.__pc
#elif defined(__mips__)
#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
#elif defined(__hppa__)
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16 changes: 16 additions & 0 deletions src/linux-timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -245,6 +245,22 @@ get_cycles( void )
return ret;
}

/************************/
/* loongarch64 get_cycles() */
/************************/

#elif defined(__loongarch64)
static inline long long
get_cycles( void )
{
int rid = 0;
unsigned long ret;

__asm__ __volatile__ ( "rdtime.d %0, %1" : "=r" (ret), "=r" (rid) );

return ret;
}

/************************/
/* POWER get_cycles() */
/************************/
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3 changes: 3 additions & 0 deletions src/mb.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,9 @@
#elif defined(__aarch64__)
#define rmb() asm volatile("dmb ld" ::: "memory")

#elif defined(__loongarch64)
#define rmb() __asm__ __volatile__("dbar 0" : : : "memory")

#elif defined(__mips__)
#define rmb() asm volatile( \
".set mips2\n\t" \
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