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Radxa Zero (rev. 1.51) board support #1136

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Radxa Zero (rev. 1.51) board support #1136

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910a896
radxa zero (rev. 1.51) support
way5 Dec 5, 2024
3bdc4d3
Radxa Zero hw. description fix, amplified syslog debug info in pwm.c
way5 Dec 12, 2024
53f1d89
radxa zero i2c fix
way5 Dec 16, 2024
021a934
README update, added Radxa Zero
way5 Dec 16, 2024
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -53,6 +53,7 @@ ARM
* [Radxa ROCK 3C](../master/docs/radxa_rock_3c.md)
* [Radxa ROCK 5A](../master/docs/radxa_rock_5a.md)
* [Radxa ROCK 5B](../master/docs/radxa_rock_5b.md)
* [Radxa ZERO](../master/docs/radxa_zero.md)
* [Radxa ZERO3](../master/docs/radxa_zero3.md)
* [Rock Pi 4](../master/docs/rockpi4.md)
* [Orange Pi Prime](../master/docs/orange_pi_prime.md)
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1 change: 1 addition & 0 deletions api/mraa/types.h
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Expand Up @@ -79,6 +79,7 @@ typedef enum {
MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
MRAA_RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
MRAA_RADXA_E25 = 36, /**< Radxa E25 */
MRAA_RADXA_ZERO = 40, /**< Radxa Zero */

// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
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44 changes: 44 additions & 0 deletions docs/radxa_zero.md
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@@ -0,0 +1,44 @@
Radxa ZERO {#_Radxa}
=====================

Radxa Zero is an ultra thin SBC in small form factor with powerful performance based on Amlogic S905Y2. It can run Android and selected Linux distributions.

Radxa Zero features a quad core 64-bit ARM processor, up to 4GB 32bit LPDDR4 memory, HDMI output at 4K@60, WiFi and BT connectivity, USB 3.0, and 40-pin GPIO header. Additionally, the power port can also be used for USB 2.0 OTG to connect more peripheral.

Radxa Zero comes in multiple configurations to suit your need. Please check Models & SKU for detail.

Pin Mapping (rev. 1.51)
-----------

| GPIO number | Function4 | Function3 | Function2 | Function1 | Pin# | Pin# | Function1 | Function2 | Function3 | Function4 | GPIO number |
|:-----:|:-----:|:-----:|:-----:|:-----:|-----:|:-----|:-----:|:-----:|:-----:|:-----:|:-----:|
| | | | | +3.3V | **1** | **2** | +5.0V | | | | ||
| 490 | | | I2C_EE_M3_SDA | GPIOA_14 (*) | **3** | **4** | +5.0V | | | ||
| 491 | | | I2C_EE_M3_SCL | GPIOA_15 (*) | **5** | **6** | GND | | | ||
| 415 | I2C_AO_S0_SDA | UART_AO_B_RX | I2C_AO_M0_SDA | GPIOAO_3 | **7** | **8** | GPIOAO_0 | UART_AO_A_TXD | | | 412 |
| | | | GND | | **9** | **10** | GPIOAO_1 | UART_AO_A_RXD | | | 413 |
| 414 | I2C_AO_S0_SCL | UART_AO_B_TX | I2C_AO_M0_SCL | GPIOAO_2 | **11** | **12** | GPIOX_9 | SPI_A_MISO | TDMA_D0 | | 501 |
| 503 | TDMA_SCLK | I2C_EE_M1_SCL |SPI_A_SCLK | GPIOX_11 | **13** | **14** | GND | | | |
| | | | SARADC_CH1 | | **15** | **16** | GPIOX_10 | SPI_A_SS0 | I2C_EE_M1_SDA | TDMA_FS | 502 |
| | | | +3.3V | | **17** | **18** | GPIOX_8 | SPI_A_MOSI | PWM_C | TDMA_D1 | 500 |
| 447 | SPI_B_MOSI | UART_EE_C_RTS | GPIOH_4 | | **19** | **20** | GND | | | |
| 448 | PWM_F | SPI_B_MISO | UART_EE_C_CTS | GPIOH_5 | **21** | **22** | GPIOC_7 | - | | | 475 |
| 450 | I2C_EE_M1_SCL | SPI_B_SCLK | UART_EE_C_TX | GPIOH_7 | **23** | **24** | GPIOH_6 | UART_EE_C_RX | SPI_B_SS0 | I2C_EE_M1_SDA | 449 |
| | | | GND | | **25** | **26** | SARADC_CH2 | | | ||
| 415 | I2C_AO_S0_SDA | UART_AO_B_RX | I2C_AO_M0_SDA | GPIOAO_3 | **27** | **28** | GPIOAO_2 | I2C_AO_M0_SCL | ART_AO_B_TX | I2C_AO_S0_SCL | 414 |
| | | | NC | | **29** | **30** | GND | | | |
| | | | NC | | **31** | **32** | GPIOAO_4 | PWMAO_C | | | 416 |
| | | | NC | | **33** | **34** | GND | | | |
| 420 | | | UART_AO_B_TX | GPIOAO_8 | **35** | **36** | GPIOH_8 | - | | | 451 |
| 421 | | | UART_AO_B_RX | GPIOAO_9 | **37** | **38** | NC | | | |
| | | | GND | | **39** | **40** | GPIOAO_11 | PWMAO_A | | | 423 |

Supports
--------

You can find additional product support in the following channels:

- [Product Info](https://docs.radxa.com/en/zero/zero)
- [Wiki](https://wiki.radxa.com/Zero)
- [Forums](https://forum.radxa.com/c/zero)
- [Github](https://github.com/radxa)
9 changes: 5 additions & 4 deletions examples/c/pwm.c
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Expand Up @@ -68,6 +68,11 @@ main(void)
while (flag) {
value = value + 0.01f;

/* avoid syslog warnings: pwm_write: 100%% entered, defaulting to 100% */
if (value >= 1.0f) {
value = 0.0f;
}

/* write PWM duty cyle */
status = mraa_pwm_write(pwm, value);
if (status != MRAA_SUCCESS) {
Expand All @@ -76,10 +81,6 @@ main(void)

usleep(50000);

if (value >= 1.0f) {
value = 0.0f;
}

/* read PWM duty cyle */
output = mraa_pwm_read(pwm);
fprintf(stdout, "PWM value is %f\n", output);
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30 changes: 30 additions & 0 deletions include/arm/radxa_zero_151.h
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/*
* Author: Sergey Ko <[email protected]>
* Copyright (c) Radxa Limited.
*
* SPDX-License-Identifier: MIT
*/

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

#include "mraa_internal.h"

#define MRAA_RADXA_ZERO_151_GPIO_COUNT 23
#define MRAA_RADXA_ZERO_151_I2C_COUNT 4
#define MRAA_RADXA_ZERO_151_SPI_COUNT 2
#define MRAA_RADXA_ZERO_151_UART_COUNT 3
#define MRAA_RADXA_ZERO_151_PWM_COUNT 2
#define MRAA_RADXA_ZERO_151_AIO_COUNT 0
#define MRAA_RADXA_ZERO_151_PIN_COUNT 40
#define PLATFORM_NAME_RADXA_ZERO "Radxa Zero"

mraa_board_t *
mraa_radxa_zero();

#ifdef __cplusplus
}
#endif
2 changes: 1 addition & 1 deletion include/mraa_internal.h
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Expand Up @@ -61,7 +61,7 @@ mraa_platform_t mraa_mips_platform();
* @return mraa_platform_t of the init'ed platform
*/
mraa_platform_t mraa_mock_platform();

/**
* runtime detect running risc-v platforms
*
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1 change: 1 addition & 0 deletions src/CMakeLists.txt
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Expand Up @@ -114,6 +114,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/radxa_e25.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5b.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_zero_151.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_cm5_io.c
${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c
${PROJECT_SOURCE_DIR}/src/arm/adlink_ipi.c
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6 changes: 6 additions & 0 deletions src/arm/arm.c
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Expand Up @@ -17,6 +17,7 @@
#include "arm/radxa_rock_3c.h"
#include "arm/radxa_rock_5a.h"
#include "arm/radxa_rock_5b.h"
#include "arm/radxa_zero_151.h"
#include "arm/radxa_cm5_io.h"
#include "arm/rockpi4.h"
#include "arm/de_nano_soc.h"
Expand Down Expand Up @@ -117,6 +118,8 @@ mraa_arm_platform()
platform_type = MRAA_RADXA_ROCK_5A;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_5B))
platform_type = MRAA_RADXA_ROCK_5B;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ZERO))
platform_type = MRAA_RADXA_ZERO;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM5_IO))
platform_type = MRAA_RADXA_CM5_IO;
else if (mraa_file_contains("/proc/device-tree/model", "ROCK Pi 4") ||
Expand Down Expand Up @@ -171,6 +174,9 @@ mraa_arm_platform()
case MRAA_RADXA_ROCK_5B:
plat = mraa_radxa_rock_5b();
break;
case MRAA_RADXA_ZERO:
plat = mraa_radxa_zero();
break;
case MRAA_RADXA_CM5_IO:
plat = mraa_radxa_cm5_io();
break;
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151 changes: 151 additions & 0 deletions src/arm/radxa_zero_151.c
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/*
* Author: Sergey Ko <[email protected]>
* Copyright (c) Radxa Limited.
*
* SPDX-License-Identifier: MIT
*/

#include "arm/radxa_zero_151.h"
#include "common.h"
#include <mraa/common.h>
#include <stdarg.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>

const char* radxa_zero_151_serialdev[MRAA_RADXA_ZERO_151_UART_COUNT] = { "/dev/ttyAML0", "/dev/ttyAML1", "/dev/ttyAML4" };

void
mraa_radxa_zero_pininfo(mraa_board_t* board,
int index,
int gpio_chip,
int gpio_line,
mraa_pincapabilities_t pincapabilities_t,
char* pin_name)
{

if (index > board->phy_pin_count)
return;

mraa_pininfo_t* pininfo = &board->pins[index];
strncpy(pininfo->name, pin_name, MRAA_PIN_NAME_SIZE);

if (pincapabilities_t.gpio == 1) {
pininfo->gpio.gpio_chip = gpio_chip;
pininfo->gpio.gpio_line = gpio_line;
}

pininfo->capabilities = pincapabilities_t;

pininfo->gpio.mux_total = 0;
}

mraa_board_t*
mraa_radxa_zero()
{
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}

b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
free(b);
return NULL;
}

// pin mux for buses are setup by default by kernel so tell mraa to ignore them
b->no_bus_mux = 1;
b->phy_pin_count = MRAA_RADXA_ZERO_151_PIN_COUNT + 1;

b->platform_name = PLATFORM_NAME_RADXA_ZERO;
b->chardev_capable = 1;

// UART
b->uart_dev_count = MRAA_RADXA_ZERO_151_UART_COUNT;
b->def_uart_dev = 0;
b->uart_dev[0].index = 0; // GPIOAO-0, GPIOAO-1
b->uart_dev[1].index = 1; // GPIOAO-2, GPIOAO-3 / GPIOAO-8, GPIOAO-9
b->uart_dev[2].index = 4; // GPIOH_6, GPIOH_7, GPIOH_4, GPIOH_5
b->uart_dev[0].device_path = (char*) radxa_zero_151_serialdev[0];
b->uart_dev[1].device_path = (char*) radxa_zero_151_serialdev[1];
b->uart_dev[2].device_path = (char*) radxa_zero_151_serialdev[2];

// I2C
b->i2c_bus_count = MRAA_RADXA_ZERO_151_I2C_COUNT;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 1; // GPIOAO-2, GPIOAO-3
b->i2c_bus[1].bus_id = 3; // GPIOX-10, GPIOX-11
b->i2c_bus[2].bus_id = 4; // GPIOH-6, GPIOH-7
b->i2c_bus[3].bus_id = 5; // GPIOA-14, GPIOA-15

// SPI
b->spi_bus_count = MRAA_RADXA_ZERO_151_SPI_COUNT;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 0; // GPIOX_10, GPIOX_11, GPIOX_8, GPIOX_9
b->spi_bus[1].bus_id = 1; // GPIOH_6, GPIOH_7, GPIOH_4, GPIOH_5

// PWM
b->pwm_dev_count = MRAA_RADXA_ZERO_151_PWM_COUNT;
b->pwm_default_period = 500;
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;

b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
if (b->pins == NULL) {
free(b->adv_func);
free(b);
return NULL;
}

b->pins[18].pwm.parent_id = 0; // GPIOX_8
b->pins[18].pwm.mux_total = 0;
b->pins[18].pwm.pinmap = 0;
b->pins[40].pwm.parent_id = 2; // GPIOAO_11
b->pins[40].pwm.mux_total = 0;
b->pins[40].pwm.pinmap = 1;

mraa_radxa_zero_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t) { 0, 0, 0, 0, 0, 0, 0, 0 }, "INVALID");
mraa_radxa_zero_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "3V3");
mraa_radxa_zero_pininfo(b, 2, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "5V");
mraa_radxa_zero_pininfo(b, 3, 0, 72, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 0 }, "I2C_EE_SDA"); // GPIOA_14
mraa_radxa_zero_pininfo(b, 4, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "5V");
mraa_radxa_zero_pininfo(b, 5, 1, 5, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 0 }, "I2C_EE_SCL"); // GPIOA_15
mraa_radxa_zero_pininfo(b, 6, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 7, 1, 4, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 1 }, "I2C_AO_SDA"); // GPIOA_3
mraa_radxa_zero_pininfo(b, 8, 1, 0, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 1 }, "UART_AO_TX"); // GPIOAO_0
mraa_radxa_zero_pininfo(b, 9, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 10, 1, 1, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 1 }, "UART_AO_RX"); // GPIOAO_1
mraa_radxa_zero_pininfo(b, 11, 1, 2, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 1 }, "I2C_AO_SCL"); // GPIOAO_2
mraa_radxa_zero_pininfo(b, 12, 0, 74, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 0, 0, 0 }, "SPI_A_MISO"); // GPIOX_9
mraa_radxa_zero_pininfo(b, 13, 0, 76, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 1, 0, 0 }, "I2C_EE_SCL"); // GPIOX_11
mraa_radxa_zero_pininfo(b, 14, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 15, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "SARADC_CH1");
mraa_radxa_zero_pininfo(b, 16, 0, 75, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 1, 0, 0 }, "I2C_EE_SDA"); // GPIOX_10
mraa_radxa_zero_pininfo(b, 17, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "3V3");
mraa_radxa_zero_pininfo(b, 18, 0, 73, (mraa_pincapabilities_t) { 1, 1, 1, 0, 1, 0, 0, 0 }, "SPI_A_MOSI"); // GPIOX_8
mraa_radxa_zero_pininfo(b, 19, 0, 20, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 0, 0, 0 }, "SPI_B_MOSI"); // GPIOH_4
mraa_radxa_zero_pininfo(b, 20, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 21, 0, 21, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 0, 0, 0 }, "SPI_B_MISO"); // GPIOH_5
mraa_radxa_zero_pininfo(b, 22, 0, 48, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 0 }, "GPIOC_7");
mraa_radxa_zero_pininfo(b, 23, 0, 23, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 1, 0, 1 }, "I2C_EE_SCL"); // GPIOH_7
mraa_radxa_zero_pininfo(b, 24, 0, 22, (mraa_pincapabilities_t) { 1, 1, 0, 0, 1, 1, 0, 1 }, "UART_EE_RX"); // GPIOH_6
mraa_radxa_zero_pininfo(b, 25, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 26, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "SARADC_CH2");
mraa_radxa_zero_pininfo(b, 27, 1, 3, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 1 }, "I2C_AO_SDA"); // GPIOAO_3
mraa_radxa_zero_pininfo(b, 28, 1, 2, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 1, 0, 1 }, "I2C_AO_SCL"); // GPIOAO_2
mraa_radxa_zero_pininfo(b, 29, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "NC");
mraa_radxa_zero_pininfo(b, 30, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 31, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "NC");
mraa_radxa_zero_pininfo(b, 32, 1, 4, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 0 }, "GPIOAO_4");
mraa_radxa_zero_pininfo(b, 33, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "NC");
mraa_radxa_zero_pininfo(b, 34, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 35, 1, 8, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 1 }, "UART_AO_TX"); // GPIOAO_8
mraa_radxa_zero_pininfo(b, 36, 0, 24, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 0 }, "GPIOH_8");
mraa_radxa_zero_pininfo(b, 37, 1, 9, (mraa_pincapabilities_t) { 1, 1, 0, 0, 0, 0, 0, 1 }, "UART_AO_RX"); // GPIOAO_9
mraa_radxa_zero_pininfo(b, 38, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "NC");
mraa_radxa_zero_pininfo(b, 39, -1, -1, (mraa_pincapabilities_t) { 1, 0, 0, 0, 0, 0, 0, 0 }, "GND");
mraa_radxa_zero_pininfo(b, 40, 1, 11, (mraa_pincapabilities_t) { 1, 1, 1, 0, 0, 0, 0, 0 }, "PWMAO_A"); // GPIOAO_11

return b;
}
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