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dsa-shua/README.md

Joshua's Github

About Me


Some Projects

Researches

  • [Capstone Project] Harmonizing Grid Frequency: Investigating the Optimal Mix of Grid-Forming and Grid-Following Inverters in High Penetration Grids
  • [Communication Networks] Asynchronous VPPM VLC Algorithm

Recent Personal Projects

  • FPGA BASED Systolic Arrays (Planned for 2023-Winter)
    • Output Stationary, Weight Stationary Implementations
    • Scalable Systolic Array
    • Implemented in PL, interfaced by PS

Boards

  • Raspberry Pi 4B
  • Arduino Uno
  • Arduino Nano
  • ESP32
  • Raspberry Pico
  • Xilinx PYNQ-Z2 FPGA Development Board
  • [NEW] Tang Nano 9k RISCV FPGA Development Board

Software

  • Xilinx Vivado, Xilinx Vitis
  • GPGPU-Sim
  • Accel-Sim
  • Chipyard
  • LTSpice, PSPice, HSpice
  • Logism
  • MATLAB
  • PowerWorld
  • PSCAD

Pinned

  1. FPGA-SystolicArray FPGA-SystolicArray Public

    Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

    SystemVerilog

  2. FPGA-Based-Arcade-Game FPGA-Based-Arcade-Game Public

    FPGA Based Penguin Runner Game

    SystemVerilog

  3. xv6-riscv-projects xv6-riscv-projects Public

    xv6-riscv undergrad projects for EEE3535 Operating Systems (2022-Fall Semester) @ Yonsei University

    C 1

  4. kmap-solver kmap-solver Public

    This simple kmap solver can solve 3 and 4 variable kmaps which is written in Python and interfaced using a .ipynb file. This was my final project in my Digital Logic Circuits course.

    Python

  5. arduino-asynch-communication arduino-asynch-communication Public

    Basic master-slave asynchronous communication project

    C++

  6. arduino-spi arduino-spi Public

    SPI implementation (Master->Slave)

    C++