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@Vanarill
Vanarill committed Feb 10, 2020
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1 change: 1 addition & 0 deletions Justfile
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Expand Up @@ -51,6 +51,7 @@ check-all:
DRONE_RUSTFLAGS='--cfg cortex_m_core="cortex_m4f_r0p1" --cfg stm32_mcu="stm32l4s7"' drone env thumbv7em-none-eabihf -- cargo check --package drone-stm32-map --features "{{features}}"
DRONE_RUSTFLAGS='--cfg cortex_m_core="cortex_m4f_r0p1" --cfg stm32_mcu="stm32l4r9"' drone env thumbv7em-none-eabihf -- cargo check --package drone-stm32-map --features "{{features}}"
DRONE_RUSTFLAGS='--cfg cortex_m_core="cortex_m4f_r0p1" --cfg stm32_mcu="stm32l4s9"' drone env thumbv7em-none-eabihf -- cargo check --package drone-stm32-map --features "{{features}}"
DRONE_RUSTFLAGS='--cfg cortex_m_core="cortex_m4f_r0p1" --cfg stm32_mcu="stm32wbx5"' drone env thumbv7em-none-eabihf -- cargo check --package drone-stm32-map --features "{{features}}"

# Generate the docs
doc:
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25 changes: 25 additions & 0 deletions README.md
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Expand Up @@ -18,6 +18,7 @@ a drop-in replacement for it.

## Supported Devices

<<<<<<< HEAD
| `stm32_mcu` | Core name | Reference manual | Available features |
|-------------|-----------------------|--------------------------------------------------------------------------|----------------------------------------------------------|
| `stm32f100` | ARM® Cortex®-M3 r1p1 | [RM0041](https://www.st.com/resource/en/reference_manual/cd00246267.pdf) | `dma` `gpio` `spi` `tim` |
Expand Down Expand Up @@ -50,6 +51,30 @@ a drop-in replacement for it.

`stm32_mcu` config flag should be set at the application level according to
this table.
=======
| Device name / Cargo feature | Core name | Reference manual |
|-------------|-----------------------|--------------------------------------------------------------------------|
| `stm32f100` | ARM® Cortex®-M3 r1p1 | [RM0041](https://www.st.com/resource/en/reference_manual/cd00246267.pdf) |
| `stm32f101` | ARM® Cortex®-M3 r1p1 | [RM0008](https://www.st.com/resource/en/reference_manual/cd00171190.pdf) |
| `stm32f102` | ARM® Cortex®-M3 r1p1 | [RM0008](https://www.st.com/resource/en/reference_manual/cd00171190.pdf) |
| `stm32f103` | ARM® Cortex®-M3 r1p1 | [RM0008](https://www.st.com/resource/en/reference_manual/cd00171190.pdf) |
| `stm32f107` | ARM® Cortex®-M3 r1p1 | [RM0008](https://www.st.com/resource/en/reference_manual/cd00171190.pdf) |
| `stm32l4x1` | ARM® Cortex®-M4F r0p1 | [RM0394](https://www.st.com/resource/en/reference_manual/dm00151940.pdf) |
| `stm32l4x2` | ARM® Cortex®-M4F r0p1 | [RM0394](https://www.st.com/resource/en/reference_manual/dm00151940.pdf) |
| `stm32l4x3` | ARM® Cortex®-M4F r0p1 | [RM0394](https://www.st.com/resource/en/reference_manual/dm00151940.pdf) |
| `stm32l4x5` | ARM® Cortex®-M4F r0p1 | [RM0351](https://www.st.com/resource/en/reference_manual/dm00083560.pdf) |
| `stm32l4x6` | ARM® Cortex®-M4F r0p1 | [RM0351](https://www.st.com/resource/en/reference_manual/dm00083560.pdf) |
| `stm32l4r5` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32l4s5` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32l4r7` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32l4s7` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32l4r9` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32l4s9` | ARM® Cortex®-M4F r0p1 | [RM0432](https://www.st.com/resource/en/reference_manual/dm00310109.pdf) |
| `stm32wbx5` | ARM® Cortex®-M4F r0p1 | [RM0434](https://www.st.com/resource/en/reference_manual/dm00318631.pdf) |

**NOTE** Exactly one cargo feature should be selected based on the device
model.
>>>>>>> Initial WB55 support.
## Documentation

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12 changes: 8 additions & 4 deletions src/periph/gpio/lib.rs
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Expand Up @@ -51,7 +51,8 @@ periph! {
stm32_mcu = "stm32l4r9",
stm32_mcu = "stm32l4s5",
stm32_mcu = "stm32l4s7",
stm32_mcu = "stm32l4s9"
stm32_mcu = "stm32l4s9",
stm32_mcu = "stm32wbx5"
))]
BUSSMENR {
0x20 RwRegBitBand Shared;
Expand Down Expand Up @@ -82,7 +83,8 @@ periph! {
stm32_mcu = "stm32l4r9",
stm32_mcu = "stm32l4s5",
stm32_mcu = "stm32l4s7",
stm32_mcu = "stm32l4s9"
stm32_mcu = "stm32l4s9",
stm32_mcu = "stm32wbx5"
))]
AFRL {
0x20 RwReg;
Expand Down Expand Up @@ -117,7 +119,8 @@ periph! {
stm32_mcu = "stm32l4r9",
stm32_mcu = "stm32l4s5",
stm32_mcu = "stm32l4s7",
stm32_mcu = "stm32l4s9"
stm32_mcu = "stm32l4s9",
stm32_mcu = "stm32wbx5"
))]
AFRH {
0x20 RwReg;
Expand All @@ -132,7 +135,8 @@ periph! {
}
#[cfg(any(
stm32_mcu = "stm32l4x5",
stm32_mcu = "stm32l4x6"
stm32_mcu = "stm32l4x6",
stm32_mcu = "stm32wbx5"
))]
ASCR {
0x20 RwReg Option;
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199 changes: 199 additions & 0 deletions svd/src/lib.rs
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Expand Up @@ -74,10 +74,16 @@ fn svd_deserialize() -> Result<Device> {
"stm32l4s5" => patch_stm32l4plus(parse_svd("STM32L4S5.svd")?),
"stm32l4s7" => patch_stm32l4plus(parse_svd("STM32L4S7.svd")?),
"stm32l4s9" => patch_stm32l4plus(parse_svd("STM32L4S9.svd")?),
"stm32wbx5" => patch_stm32wbx5(parse_svd("STM32WBxx_CM4.svd")?),
_ => bail!("invalid `stm32_mcu` cfg flag"),
}
}

fn patch_stm32wbx5(mut dev: Device) -> Result<Device> {
fix_802154(&mut dev)?;
Ok(dev)
}

fn patch_stm32f102(mut dev: Device) -> Result<Device> {
spi::fix_spi2_1(&mut dev)?;
Ok(dev)
Expand Down Expand Up @@ -197,6 +203,199 @@ fn patch_stm32f413(mut dev: Device) -> Result<Device> {
tim::fix_tim11_1(&mut dev)?;
adc::fix_adc1_1(&mut dev)?;
Ok(dev)
fn fix_802154(dev: &mut Device) -> Result<(), Error> {
dev.field_mut("PWR", "SR1", "802WUF").name = "IEEE802WUF".to_string();
dev.field_mut("PWR", "C2CR1", "802EWKUP").name = "IEEE802EWKUP".to_string();
Ok(())
}

fn add_dmamux(dev: &mut Device) -> Result<(), Error> {
dev.add_peripheral(serde_xml_rs::deserialize(
read_svd("patch/add_dmamux.xml")?.as_bytes(),
)?);
Ok(())
}

fn add_tim3(dev: &mut Device) -> Result<(), Error> {
dev.new_peripheral(|peripheral| {
peripheral.derived_from = Some("TIM2".to_string());
peripheral.name = "TIM3".to_string();
peripheral.base_address = 0x4000_0400;
peripheral.interrupt = vec![Interrupt {
name: "TIM3".to_string(),
description: "TIM3 global interrupt".to_string(),
value: 29,
}];
});
Ok(())
}

fn fix_adc(dev: &mut Device) -> Result<(), Error> {
dev.field_mut("RCC", "AHB2SMENR", "ADCFSSMEN").name = "ADCSMEN".to_string();
Ok(())
}

fn fix_exti(dev: &mut Device) -> Result<(), Error> {
for (reg_name, field_name) in &[("IMR2", "MR39"), ("EMR2", "MR39")] {
let mut field = dev.field("EXTI", reg_name, field_name).clone();
field.name = field.name.replace("39", "40");
field.description = field.description.replace("39", "40");
field.bit_offset += 1;
dev.add_field("EXTI", reg_name, field);
}
Ok(())
}

fn fix_i2c(dev: &mut Device) -> Result<(), Error> {
dev.add_field("RCC", "APB1SMENR2", Field {
name: "I2C4SMEN".to_string(),
description: "I2C4 clocks enable during Sleep and Stop modes".to_string(),
bit_offset: 1,
bit_width: 1,
access: None,
});
Ok(())
}

fn fix_lptim1(dev: &mut Device) -> Result<(), Error> {
dev.new_register("LPTIM1", |reg| {
reg.name = "OR".to_string();
reg.description = format!("{} option register", "LPTIM1");
reg.address_offset = 0x20;
reg.size = 0x20;
reg.access = Some(Access::ReadWrite);
reg.reset_value = 0x0000;
reg.add_field(Field {
name: "OR_0".to_string(),
description: "Option register bit 0".to_string(),
bit_offset: 0,
bit_width: 1,
access: None,
});
reg.add_field(Field {
name: "OR_1".to_string(),
description: "Option register bit 1".to_string(),
bit_offset: 1,
bit_width: 1,
access: None,
});
});
Ok(())
}

fn fix_lptim2(dev: &mut Device) -> Result<(), Error> {
dev.new_register("LPTIM2", |reg| {
reg.name = "OR".to_string();
reg.description = format!("{} option register", "LPTIM2");
reg.address_offset = 0x20;
reg.size = 0x20;
reg.access = Some(Access::ReadWrite);
reg.reset_value = 0x0000;
reg.add_field(Field {
name: "OR_0".to_string(),
description: "Option register bit 0".to_string(),
bit_offset: 0,
bit_width: 1,
access: None,
});
reg.add_field(Field {
name: "OR_1".to_string(),
description: "Option register bit 1".to_string(),
bit_offset: 1,
bit_width: 1,
access: None,
});
});
Ok(())
}

fn fix_lpuart1(dev: &mut Device) -> Result<(), Error> {
copy_field(dev, "USART3", "LPUART1", "CR3", "UCESM");
Ok(())
}

fn fix_pwr(dev: &mut Device) -> Result<(), Error> {
dev.add_field("PWR", "CR1", Field {
name: "RRSTP".to_string(),
description: "SRAM3 retention in Stop 2 mode".to_string(),
bit_offset: 4,
bit_width: 1,
access: None,
});
Ok(())
}

fn fix_rcc(dev: &mut Device) -> Result<(), Error> {
dev.new_register("RCC", |reg| {
reg.name = "CCIPR2".to_string();
reg.description = "Peripherals independent clock configuration register".to_string();
reg.address_offset = 0x9C;
reg.size = 0x20;
reg.access = Some(Access::ReadWrite);
reg.reset_value = 0x0000;
reg.add_field(Field {
name: "I2C4SEL".to_string(),
description: "I2C4 clock source selection".to_string(),
bit_offset: 0,
bit_width: 2,
access: None,
});
});
Ok(())
}

fn fix_rtc(dev: &mut Device) -> Result<(), Error> {
dev.add_field("RCC", "APB1ENR1", Field {
name: "RTCAPBEN".to_string(),
description: "RTC APB clock enable".to_string(),
bit_offset: 10,
bit_width: 1,
access: None,
});
dev.add_field("RCC", "APB1SMENR1", Field {
name: "RTCAPBSMEN".to_string(),
description: "RTC APB clock enable during Sleep and Stop modes".to_string(),
bit_offset: 10,
bit_width: 1,
access: None,
});
Ok(())
}

fn fix_spi2_1(dev: &mut Device) -> Result<(), Error> {
dev.add_field("RCC", "APB1ENR", Field {
name: "SPI2EN".to_string(),
description: "SPI 2 clock enable".to_string(),
bit_offset: 14,
bit_width: 1,
access: None,
});
dev.add_field("RCC", "APB1RSTR", Field {
name: "SPI2RST".to_string(),
description: "SPI2 reset".to_string(),
bit_offset: 14,
bit_width: 1,
access: None,
});
copy_field(dev, "SPI1", "SPI2", "SR", "UDR");
copy_field(dev, "SPI1", "SPI2", "SR", "CHSIDE");
Ok(())
}

fn fix_spi2_2(dev: &mut Device) -> Result<(), Error> {
dev.add_field("RCC", "APB1ENR1", Field {
name: "SPI2EN".to_string(),
description: "SPI2 clock enable".to_string(),
bit_offset: 14,
bit_width: 1,
access: None,
});
Ok(())
}

fn fix_spi3_1(dev: &mut Device) -> Result<(), Error> {
dev.field_mut("RCC", "APB1SMENR1", "SP3SMEN").name = "SPI3SMEN".to_string();
Ok(())
}

fn patch_stm32f427(mut dev: Device) -> Result<Device> {
Expand Down
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