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ILC: Add property for target processor tuning #108540

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sweemer opened this issue Oct 4, 2024 · 9 comments
Closed

ILC: Add property for target processor tuning #108540

sweemer opened this issue Oct 4, 2024 · 9 comments
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area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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@sweemer
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sweemer commented Oct 4, 2024

Description

Currently there is the IlcInstructionSet property that works (I assume) in a similar way to the -march option for GCC and Clang, but I can't find any ILC property that corresponds to the -mtune option. Is target processor tuning functionality available in ILC? If so, can a property be created to configure it? If not, can it be added?

Also, is there a property that can be set to show all the ILC args used for compilation such as --instruction-set? I tried setting IlcVerboseLogging but it doesn't print out the ILC args despite printing out a lot of other information.

Reproduction Steps

N/A

Expected behavior

Target processor tuning is available

Actual behavior

Only target processor architecture selection is available

Regression?

No response

Known Workarounds

No response

Configuration

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Other information

No response

@dotnet-issue-labeler dotnet-issue-labeler bot added the needs-area-label An area label is needed to ensure this gets routed to the appropriate area owners label Oct 4, 2024
@dotnet-policy-service dotnet-policy-service bot added the untriaged New issue has not been triaged by the area owner label Oct 4, 2024
@martincostello martincostello added area-Tools-ILLink .NET linker development as well as trimming analyzers and removed needs-area-label An area label is needed to ensure this gets routed to the appropriate area owners labels Oct 4, 2024
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Tagging subscribers to this area: @agocke, @sbomer, @vitek-karas
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@MichalStrehovsky MichalStrehovsky removed the area-Tools-ILLink .NET linker development as well as trimming analyzers label Oct 4, 2024
@MichalStrehovsky
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Native AOT can only add this if the underlying code generator supports this. I don't think RyuJIT supports this. I'll move this to the codegen area path so that relevant feature team can consider/decide this.

@MichalStrehovsky MichalStrehovsky added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Oct 4, 2024
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
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@EgorBo
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EgorBo commented Oct 4, 2024

We generally intentionally avoid any kind of processor-specific tuning as it complicates test matrix a lot for questionable benefits. So yeah, JIT doesn't have -mtune. The only thing we do in cpu detection is to disable AVX512 for old Intels where it leads to throttling.

@JulieLeeMSFT JulieLeeMSFT removed the untriaged New issue has not been triaged by the area owner label Oct 4, 2024
@sweemer
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sweemer commented Oct 6, 2024

@EgorBo Thanks for the explanation. Does this mean that RyuJIT doesn't consider the current processor's cache hierarchy, branch prediction capabilities, etc. when generating machine code? If so then this could be one potential area for improvement (which I'm sure I'm not the first one to suggest).

@MichalStrehovsky Would you be the right person to answer my second question about how to see all the ILC args used for compilation?

@EgorBo
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EgorBo commented Oct 6, 2024

@EgorBo Thanks for the explanation. Does this mean that RyuJIT doesn't consider the current processor's cache hierarchy, branch prediction capabilities, etc. when generating machine code? If so then this could be one potential area for improvement (which I'm sure I'm not the first one to suggest).

Correct. We might eventually rely on some CPU-specific details when (if) we implement partial loop unrolling etc. but for now I can't think of a case where any of that could help us. E.g. for the "branch prediction capabilities" we have a more profitable Dynamic PGO.

@jkotas
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jkotas commented Oct 6, 2024

how to see all the ILC args used for compilation?

ILC does not have an option to print its own command line. You can find the full command line passed to ILC in the <your project name>.ilc.rsp file under your obj directory.

@sweemer
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sweemer commented Oct 6, 2024

Correct. We might eventually rely on some CPU-specific details when (if) we implement partial loop unrolling etc. but for now I can't think of a case where any of that could help us. E.g. for the "branch prediction capabilities" we have a more profitable Dynamic PGO.

So I guess the best approach would be to leverage Dynamic PGO within Native AOT somehow. Looks like there is already issue #94052 about it but no activity for the past year. Is it somewhere on the long-term roadmap?

@JulieLeeMSFT
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Please follow up in #94052 directly. Closing this issue.

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