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stm32f3 crate
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@burrbull
burrbull committed May 5, 2019
1 parent 323308f commit 6c6442d
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Showing 12 changed files with 134 additions and 136 deletions.
22 changes: 19 additions & 3 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -10,14 +10,17 @@ repository = "https://github.com/copterust/alt-stm32f30x-hal"
version = "0.18.1-alpha.0"
edition = "2018"

[package.metadata.docs.rs]
features = ["stm32f303", "rt"]

[dependencies]
cortex-m = "0.5.8"
nb = "0.1.0"
bobbin-bits = "0.1.1"
bitrate = "0.1.1"

[dependencies.stm32f30x]
version = "0.8.0"
[dependencies.stm32f3]
version = "0.7.0"

[dependencies.hal]
features = ["unproven"]
Expand All @@ -32,5 +35,18 @@ version = "1.0.2"
default-features = false
version = "0.2.2"


[features]
rt = ["stm32f30x/rt"]
default = []
device-selected = []
rt = ["stm32f3/rt"]
#stm32f301 = ["stm32f3/stm32f301", "device-selected"]
#stm32f318 = ["stm32f3/stm32f301", "device-selected", "stm32f301"]
stm32f302 = ["stm32f3/stm32f302", "device-selected"]
stm32f303 = ["stm32f3/stm32f303", "device-selected"]
#stm32f373 = ["stm32f3/stm32f373", "device-selected"]
#stm32f378 = ["stm32f3/stm32f373", "device-selected", "stm32f373"]
#stm32f334 = ["stm32f3/stm32f3x4", "device-selected"]
#stm32f328 = ["stm32f3/stm32f3x8", "device-selected"]
#stm32f358 = ["stm32f3/stm32f3x8", "device-selected", "stm32f328"]
#stm32f398 = ["stm32f3/stm32f3x8", "device-selected", "stm32f328"]
111 changes: 28 additions & 83 deletions src/dma.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -129,14 +129,7 @@ pub struct W;
macro_rules! dma {
($($DMAX:ident: ($dmaX:ident, $dmaXen:ident, $dmaXrst:ident, {
$($CX:ident: (
$ccrX:ident,
$CCRX:ident,
$cndtrX:ident,
$CNDTRX:ident,
$cparX:ident,
$CPARX:ident,
$cmarX:ident,
$CMARX:ident,
$chX:ident,
$htifX:ident,
$tcifX:ident,
$chtifX:ident,
Expand All @@ -149,7 +142,7 @@ macro_rules! dma {
pub mod $dmaX {
use core::sync::atomic::{self, Ordering};

use crate::stm32f30x::{$DMAX, dma1};
use crate::pac::{$DMAX, dma1};

use crate::dma::{CircBuffer, DmaExt, Error, Event, Half, Transfer, W};
use crate::rcc::AHB;
Expand All @@ -165,9 +158,9 @@ macro_rules! dma {
/// listen
pub fn listen(&mut self, event: Event) {
match event {
Event::HalfTransfer => self.ccr().modify(|_, w| w.htie().set_bit()),
Event::HalfTransfer => self.ch().cr.modify(|_, w| w.htie().set_bit()),
Event::TransferComplete => {
self.ccr().modify(|_, w| w.tcie().set_bit())
self.ch().cr.modify(|_, w| w.tcie().set_bit())
}
}
}
Expand All @@ -176,14 +169,18 @@ macro_rules! dma {
pub fn unlisten(&mut self, event: Event) {
match event {
Event::HalfTransfer => {
self.ccr().modify(|_, w| w.htie().clear_bit())
self.ch().cr.modify(|_, w| w.htie().clear_bit())
},
Event::TransferComplete => {
self.ccr().modify(|_, w| w.tcie().clear_bit())
self.ch().cr.modify(|_, w| w.tcie().clear_bit())
}
}
}

pub(crate) fn ch(&mut self) -> &dma1::CH {
unsafe { &(*$DMAX::ptr()).$chX }
}

pub(crate) fn isr(&self) -> dma1::isr::R {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*$DMAX::ptr()).isr.read() }
Expand All @@ -193,25 +190,9 @@ macro_rules! dma {
unsafe { &(*$DMAX::ptr()).ifcr }
}

pub(crate) fn ccr(&mut self) -> &dma1::$CCRX {
unsafe { &(*$DMAX::ptr()).$ccrX }
}

pub(crate) fn cndtr(&mut self) -> &dma1::$CNDTRX {
unsafe { &(*$DMAX::ptr()).$cndtrX }
}

pub(crate) fn cpar(&mut self) -> &dma1::$CPARX {
unsafe { &(*$DMAX::ptr()).$cparX }
}

pub(crate) fn cmar(&mut self) -> &dma1::$CMARX {
unsafe { &(*$DMAX::ptr()).$cmarX }
}

pub(crate) fn get_cndtr(&self) -> u32 {
pub(crate) fn get_ndtr(&self) -> u32 {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*$DMAX::ptr()).$cndtrX.read().bits() }
unsafe { &(*$DMAX::ptr())}.$chX.ndtr.read().bits()
}

}
Expand Down Expand Up @@ -298,7 +279,7 @@ macro_rules! dma {

self.channel.ifcr().write(|w| w.$cgifX().set_bit());

self.channel.ccr().modify(|_, w| w.en().clear_bit());
self.channel.ch().cr.modify(|_, w| w.en().clear_bit());

// TODO can we weaken this compiler barrier?
// NOTE(compiler_fence) operations on `buffer` should not be reordered
Expand All @@ -315,7 +296,7 @@ macro_rules! dma {
where
BUFFER: AsRef<[T]>,
{
let pending = self.channel.get_cndtr() as usize;
let pending = self.channel.get_ndtr() as usize;

let slice = self.buffer.as_ref();
let capacity = slice.len();
Expand All @@ -333,7 +314,7 @@ macro_rules! dma {

// reset the DMA control registers (stops all on-going transfers)
$(
self.$ccrX.reset();
self.$chX.cr.reset();
)+

Channels((), $($CX { _0: () }),+)
Expand All @@ -345,103 +326,67 @@ macro_rules! dma {
}

dma! {
DMA1: (dma1, dmaen, dma1rst, {
DMA1: (dma1, dma1en, dma1rst, {
C1: (
ccr1, CCR1,
cndtr1, CNDTR1,
cpar1, CPAR1,
cmar1, CMAR1,
ch1,
htif1, tcif1,
chtif1, ctcif1, cgif1
),
C2: (
ccr2, CCR2,
cndtr2, CNDTR2,
cpar2, CPAR2,
cmar2, CMAR2,
ch2,
htif2, tcif2,
chtif2, ctcif2, cgif2
),
C3: (
ccr3, CCR3,
cndtr3, CNDTR3,
cpar3, CPAR3,
cmar3, CMAR3,
ch3,
htif3, tcif3,
chtif3, ctcif3, cgif3
),
C4: (
ccr4, CCR4,
cndtr4, CNDTR4,
cpar4, CPAR4,
cmar4, CMAR4,
ch4,
htif4, tcif4,
chtif4, ctcif4, cgif4
),
C5: (
ccr5, CCR5,
cndtr5, CNDTR5,
cpar5, CPAR5,
cmar5, CMAR5,
ch5,
htif5, tcif5,
chtif5, ctcif5, cgif5
),
C6: (
ccr6, CCR6,
cndtr6, CNDTR6,
cpar6, CPAR6,
cmar6, CMAR6,
ch6,
htif6, tcif6,
chtif6, ctcif6, cgif6
),
C7: (
ccr7, CCR7,
cndtr7, CNDTR7,
cpar7, CPAR7,
cmar7, CMAR7,
ch7,
htif7, tcif7,
chtif7, ctcif7, cgif7
),
}),

DMA2: (dma2, dma2en, dma2rst, {
C1: (
ccr1, CCR1,
cndtr1, CNDTR1,
cpar1, CPAR1,
cmar1, CMAR1,
ch1,
htif1, tcif1,
chtif1, ctcif1, cgif1
),
C2: (
ccr2, CCR2,
cndtr2, CNDTR2,
cpar2, CPAR2,
cmar2, CMAR2,
ch2,
htif2, tcif2,
chtif2, ctcif2, cgif2
),
C3: (
ccr3, CCR3,
cndtr3, CNDTR3,
cpar3, CPAR3,
cmar3, CMAR3,
ch3,
htif3, tcif3,
chtif3, ctcif3, cgif3
),
C4: (
ccr4, CCR4,
cndtr4, CNDTR4,
cpar4, CPAR4,
cmar4, CMAR4,
ch4,
htif4, tcif4,
chtif4, ctcif4, cgif4
),
C5: (
ccr5, CCR5,
cndtr5, CNDTR5,
cpar5, CPAR5,
cmar5, CMAR5,
ch5,
htif5, tcif5,
chtif5, ctcif5, cgif5
),
Expand Down
8 changes: 4 additions & 4 deletions src/exti.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
use crate::gpio;
use crate::syscfg::Syscfg;

use stm32f30x::{self, EXTI};
use crate::pac::{self, EXTI};

/// Extension trait that contsrins the `EXTI` peripheral
pub trait ExtiExt {
Expand Down Expand Up @@ -93,7 +93,7 @@ impl<E: ExternalInterrupt> Exti<E> {
#[doc(hidden)]
pub trait ExternalInterrupt: private::Sealed {
#[doc(hidden)]
fn interrupt(&self) -> stm32f30x::Interrupt;
fn interrupt(&self) -> pac::Interrupt;
#[doc(hidden)]
fn enumeration(&self) -> ExtIn;
#[doc(hidden)]
Expand Down Expand Up @@ -132,8 +132,8 @@ macro_rules! gen_exti {
_0: (),
}
impl ExternalInterrupt for $name {
fn interrupt(&self) -> stm32f30x::Interrupt {
stm32f30x::Interrupt::$exti
fn interrupt(&self) -> pac::Interrupt {
pac::Interrupt::$exti
}

fn enumeration(&self) -> ExtIn {
Expand Down
2 changes: 1 addition & 1 deletion src/flash.rs
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//! Flash memory
use stm32f30x::{flash, FLASH};
use crate::pac::{flash, FLASH};

/// Extension trait to constrain the FLASH peripheral
pub trait FlashExt {
Expand Down
2 changes: 1 addition & 1 deletion src/gpio.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -311,7 +311,7 @@ macro_rules! gpio {
($GPIOX:ident, $Gpiox:ident, $gpiox:ident, $iopxenr:ident, $iopxrst:ident, $group: ident, $PXx:ident, [
$($PXi:ident: ($pxi:ident, $i:expr, $AFR:ident),)+
]) => {
use stm32f30x::$GPIOX;
use crate::pac::$GPIOX;
/// GPIO ports
pub struct $Gpiox {
$(
Expand Down
22 changes: 11 additions & 11 deletions src/i2c.rs
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
//! Inter-Integrated Circuit (I2C) bus
use cast::u8;
use stm32f30x::{I2C1, I2C2, RCC};
use crate::pac::{I2C1, I2C2, RCC};

use crate::gpio::{AltFn, PinMode, PullType};
use crate::gpio::{HighSpeed, PushPull, AF4};
Expand Down Expand Up @@ -175,7 +175,7 @@ macro_rules! i2c {
let scll = u8(scll).unwrap();

// Configure for "fast mode" (400 KHz)
self.timingr.write(|w| unsafe {
self.timingr.write(|w|
w.presc()
.bits(presc)
.scll()
Expand All @@ -186,7 +186,7 @@ macro_rules! i2c {
.bits(sdadel)
.scldel()
.bits(scldel)
});
);

// Enable the peripheral
self.cr1.write(|w| w.pe().set_bit());
Expand All @@ -213,8 +213,8 @@ macro_rules! i2c {

// START and prepare to send `bytes`
self.i2c.cr2.write(|w| {
w.sadd1()
.bits(addr)
w.sadd()
.bits((addr << 1) as u16)
.rd_wrn()
.clear_bit()
.nbytes()
Expand Down Expand Up @@ -261,8 +261,8 @@ macro_rules! i2c {

// START and prepare to send `bytes`
self.i2c.cr2.write(|w| {
w.sadd1()
.bits(addr)
w.sadd()
.bits((addr << 1) as u16)
.rd_wrn()
.clear_bit()
.nbytes()
Expand All @@ -287,8 +287,8 @@ macro_rules! i2c {

// reSTART and prepare to receive bytes into `buffer`
self.i2c.cr2.write(|w| {
w.sadd1()
.bits(addr)
w.sadd()
.bits((addr << 1) as u16)
.rd_wrn()
.set_bit()
.nbytes()
Expand Down Expand Up @@ -329,8 +329,8 @@ macro_rules! i2c {

// reSTART and prepare to receive bytes into `buffer`
self.i2c.cr2.write(|w| {
w.sadd1()
.bits(addr)
w.sadd()
.bits((addr << 1) as u16)
.rd_wrn()
.set_bit()
.nbytes()
Expand Down
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