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Bump stm32f
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little-arhat committed Jul 7, 2020
1 parent 69a8482 commit 3c457be
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Showing 3 changed files with 53 additions and 56 deletions.
2 changes: 1 addition & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ bobbin-bits = "0.1.1"
bitrate = "0.1.1"

[dependencies.stm32f3]
version = "0.7.0"
version = "0.11.0"

[dependencies.hal]
features = ["unproven"]
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16 changes: 9 additions & 7 deletions src/rcc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
use core::cmp;

use cast::u32;
use crate::pac::{rcc, RCC};
use cast::u32;

use crate::flash::ACR;
use crate::time::Hertz;
Expand Down Expand Up @@ -336,9 +336,8 @@ impl CFGR {
// WARNING! Bit 0 in cfgr2 is connected to bit 17 in cfgr (due to
// MCU compatibility), if bit 0 is set here it must also
// be set in any subsequent write to cfgr and vise-versa
rcc.cfgr2.write(|w|
w.prediv().bits(hse_cfg.divider as u8 - 1)
);
rcc.cfgr2
.write(|w| w.prediv().bits(hse_cfg.divider as u8 - 1));

while rcc.cr.read().hserdy().bit_is_clear() {}
}
Expand All @@ -348,12 +347,15 @@ impl CFGR {

if let Some(_) = &self.hse {
// HSE as PLL input
rcc.cfgr.modify(|_, w| unsafe {
w.pllsrc().hse_div_prediv().pllmul().bits(pllmul_bits)
rcc.cfgr.modify(|_, w| {
w.pllsrc()
.hse_div_prediv()
.pllmul()
.bits(pllmul_bits)
});
} else {
// HSI as PLL input
rcc.cfgr.write(|w| unsafe { w.pllmul().bits(pllmul_bits) });
rcc.cfgr.write(|w| w.pllmul().bits(pllmul_bits));
}

rcc.cr.modify(|_, w| w.pllon().set_bit());
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91 changes: 43 additions & 48 deletions src/timer.rs
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
//! Timers
use crate::pac::{TIM2, TIM3, TIM4};
use bobbin_bits::*;
use cast::{u16, u32};
use core::intrinsics::transmute;
use cortex_m::peripheral::syst::SystClkSource;
use cortex_m::peripheral::SYST;
use hal::timer::{CountDown, Periodic};
use nb;
use crate::pac::{TIM2, TIM3, TIM4};
use void::Void;

use crate::rcc::Clocks;
Expand Down Expand Up @@ -114,7 +114,6 @@ pub mod syst {
}

impl Periodic for Timer {}

}

/// Trait for channel state
Expand Down Expand Up @@ -334,25 +333,15 @@ macro_rules! tim {
pub fn mode<NM: ChMode>(self, nm: NM) -> Channel<CN, NM> {
let tim = unsafe { &(*$TIMSRC::ptr()) };
let mode_bits: u8 = nm.channel_mode().into();
unsafe {
match CN::channel_number() {
U2::B00 => {
tim.ccmr1_output
.modify(|_, w| w.oc1m().bits(mode_bits))
}
U2::B01 => {
tim.ccmr1_output
.modify(|_, w| w.oc2m().bits(mode_bits))
}
U2::B10 => {
tim.ccmr2_output
.modify(|_, w| w.oc3m().bits(mode_bits))
}
U2::B11 => {
tim.ccmr2_output
.modify(|_, w| w.oc4m().bits(mode_bits))
}
}
match CN::channel_number() {
U2::B00 => tim.ccmr1_output()
.modify(|_, w| w.oc1m().bits(mode_bits)),
U2::B01 => tim.ccmr1_output()
.modify(|_, w| w.oc2m().bits(mode_bits)),
U2::B10 => tim.ccmr2_output()
.modify(|_, w| w.oc3m().bits(mode_bits)),
U2::B11 => tim.ccmr2_output()
.modify(|_, w| w.oc4m().bits(mode_bits)),
}

unsafe { transmute(self) }
Expand All @@ -365,22 +354,24 @@ macro_rules! tim {
let mask = true;
if index < 2 {
let offset: u32 = 3 + (index * 4);
tim.ccmr1_output.modify(|r, w| unsafe {
w.bits((r.bits()
& !((mask as u32)
tim.ccmr1_output().modify(|r, w| unsafe {
w.bits((r.bits()
& !((mask as u32)
<< offset))
| (((value & mask)
as u32)
<< offset))
| (((value & mask) as u32)
<< offset))
})
})
} else {
let offset: u32 = 3 + (index - 2) * 4;
tim.ccmr2_output.modify(|r, w| unsafe {
w.bits((r.bits()
& !((mask as u32)
tim.ccmr2_output().modify(|r, w| unsafe {
w.bits((r.bits()
& !((mask as u32)
<< offset))
| (((value & mask)
as u32)
<< offset))
| (((value & mask) as u32)
<< offset))
})
})
};
}
}
Expand Down Expand Up @@ -499,11 +490,13 @@ macro_rules! tim {
impl Timer<PwmFree> {
/// Consumes timer and returns pwm channels and timer without
/// them.
pub fn use_pwm(self) -> ((Channel<CH1, Inactive>,
Channel<CH2, Inactive>,
Channel<CH3, Inactive>,
Channel<CH4, Inactive>),
Timer<PwmTaken>) {
pub fn use_pwm(
self)
-> ((Channel<CH1, Inactive>,
Channel<CH2, Inactive>,
Channel<CH3, Inactive>,
Channel<CH4, Inactive>),
Timer<PwmTaken>) {
let ch1: Channel<CH1, Inactive> =
Channel { _index: PhantomData,
_mode: PhantomData };
Expand All @@ -524,21 +517,23 @@ macro_rules! tim {
impl Timer<PwmTaken> {
/// Returns pwm channels back.
pub fn return_pwm<M1, M2, M3, M4>(self,
_channels: (Channel<CH1, M1>,
Channel<CH2, M2>,
Channel<CH3, M3>,
Channel<CH4, M4>))
_channels: (Channel<CH1,
M1>,
Channel<CH2,
M2>,
Channel<CH3,
M3>,
Channel<CH4,
M4>))
-> Timer<PwmFree>
where
M1: ChMode,
M2: ChMode,
M3: ChMode,
M4: ChMode
where M1: ChMode,
M2: ChMode,
M3: ChMode,
M4: ChMode
{
unsafe { transmute(self) }
}
}

}
};
}
Expand Down

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