There are two executables built by this version of chp2prs:
chp2prs
, which corresponds to the previous major version ofchp2prs
synth2
, which corresponds to a new synthesis method
The plan is for synth2
to be replaced with a general synthesis engine for
ACT, so this executable is a work-in-progress and will be replaced by mid
2026 even though the functionality will be preserved.
Usage: chp2prs [-Ob] [-e <exprfile>] [-o yosys] <actfile> <process> <outfile>
The options are:
-b
: use bundled data datapath. Default is to use a QDI datapath-O
: run CHP optimizations. Requires the chp-opt package.-e <exprfile>
: process definitions for each expression evaluation are saved in<exprfile>
. The default isexpr.act
-o yosys
: run expression optimization usingyosys
. Requires the expropt package.<actfile>
: the input ACT file that contains the design<process>
: the name of the ACT process to be translated (the top-level process)<outfile>
: where the result should be saved.
Usage: synth2 [-OdRbh] [-e <exprfile>] [-o <file>] [-E abc|yosys|genus] [-p <proc>] <actfile>
The options are:
-h
: show this message-O
: run CHP optimizations. Requires the chp-opt package.-P <int>
: Parallelism level for decomposition: 0 (or) 1 (or) 2 (or) 3 (default 0)-F dataflow|sdt|ring|decomp
: select synthesis output format.dataflow
: dataflow output generation.sdt
: syntax-directed translation for prs generation.ring
: ring-based synthesis for prs generation.decomp
: decompose chp into more concurrent chp; not a prs generation step.
-R
: synthesize with ring approach. [deprecated, use-F ring
]-G
: Non-SSA style datapath [only ring]-C qdi|bd|bd2|bdp|di|ditest
: Circuit / Datapath familyqdi
: quasi delay insensitive (default)bd
: bundled databd2
: bundled data 2 phase handshake [only ring?]bdp
: bundled data pulsed [only ring]di
: delay insensitive [only ring]ditest
: delay insensitive - testing for signal forks with extra buffers - not synthesizable [only ring]
-b
: bundled-data datapath for SDT (default QDI) [deprecated use -C]-m <int>
: matched delay-line multiplier (in percentage) for ring synthesis. Default is 100 (1x).-X
: Enable projection during decomposition (w.i.p.)-P <int>
: Parallelism level for decomposition: 0 (or) 1 (or) 2 (or) 3 (or) 4 (default 0) * 0 : Only necessary decomposition * 1 : Break at receives * 2 : Break at selections * 3 : Break at minimum live variable points * 4 : Break at assignments, receives and parallel branches-e <exprfile>
: process definitions for each expression evaluation are saved in<exprfile>
. Default isexpr.act
-E abc|yosys|genus
: run expression optimization using the specified logic synthesis engine.-p <proc>
: the name of the ACT process to be translated (the top-level process). This is required.-o <file>
: where the result should be saved. Default is stdout.<actfile>
: the input ACT file that contains the design.
This program is for use with the ACT toolkit.
- Please install the ACT toolkit first; installation instructions are here.
- Install the ACT standard library
- Build this program using the standard ACT tool install instructions here.
XXX: update this!
A continuation of a project with Rajit Manohar's AVLSI group (see the original, which was developed by Zeb Mehring as part of his senior project at Yale). A program which takes in an .act
file of the form:
defproc foo() {
/* variable delcarations */
chp {
...
}
}
and compiles the constituent CHP into ACT:
defproc sdt_foo <: foo() {
/* compiled ACT */
...
}
using the libraries provided. The translation is created by using the refine { ... }
module, and so use the -ref=1
command-line option to ACT tools to use the generated circuit.
The conversion is accomplished using syntax-directed translation, which is jusfitied using direct process decomposition.
make runtest
will test the correctness of the repository by iterating through the the test/unit_tests folder and reporting the number of passing or failing tests. This runs through all variants of the translation as well.
The source code for this tool is released under the GNU GPLv2. The ACT files that provide supporting library functions (the lib/ directory) are released under GNU LGPLv2.1.
Many have contributed to this implementation over the years, and the history is roughly the following.
- 2017: The initial version was hacked together by Rajit Manohar, as a sample solution to a class lab assignment, with support for a small subset of CHP.
- 2018: Zeb Mehring took this and turned it into a much more complete implementation (see the original) as part of his senior project at Yale.
- 2020: As part of her senior project, Amanda Hansen took Zeb's version, added many of the tests, and made many significant changes to the generated ACT as well as the library. In collaboration with Linc Berkeley, she also added certain optimizations to the translation to reduce overhead (2020). After several discussions with Marly Roncken and Ebele Esimai who were modifying the tool to support their own flow, the entire implementation was re-factored in summer/fall 2020.
- 2021: The tool was converted over to the ACT pass framework. Ole Richter added external expression optimization that invokes existing logic synthesis tools to optimize the logic for expressions.
- 2021: Linc Berkeley implemented a number of CHP and dataflow optimizations
- 2022: Henry Heffan designed a cleaner intermediate representation, and moved over and updated the CHP optimizations Linc had implemented into the new data structures.
- 2023: Rajit integrated all the CHP optimizations into the core synthesis framework and implemented dataflow generation. The entire codebase was re-factored so that different synthesis engines could be added to the framework.
- 2023: Karthi Srinivasan added a new ring-based synthesis approach as an alternative to syntax-directed translation.
Papers that correspond to some of the methods used by the tools for generating asynchronous circuits:
- Karthi Srinivasan and Rajit Manohar. Maelstrom: A Logic Synthesis Technique for Asynchronous Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), May 2025. doi:10.1109/TCAD.2025.3572364
- Xiayuan Wen, Rui Li, and Rajit Manohar. Translating General Slack Elastic Programs into Dataflow Circuits. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2025. doi:10.1109/ASYNC65240.2025.00020