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mpfs/mpfs_rcc: Add stub driver for FPGA clock and reset controller #16026
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[Experimental Bot, please feedback here] Yes, this PR appears to meet the basic NuttX requirements, but it could be improved. While it addresses the core sections, it lacks specific details in key areas, weakening its overall clarity and testability. Here's a breakdown: Strengths:
Weaknesses:
Recommendations for Improvement:
By addressing these weaknesses, the PR will be significantly stronger, easier to review, and more likely to be merged. |
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This patch adds a driver framework to control individual FPGA reset and clock gates. For FPGA devices, only the fabric (FIC0/FIC1/FIC3) clock and reset can be controlled, which affects the whole fabric / domain. This is problematic for obvious reasons. For MSS peripherals, clocks and reset are controlled individually for each peripheral via MSS memory mapped registers (MPFS_SYSREG). To get the same capability for FPGA peripherals, the same controller needs to be fabricated on the FPGA. However, the FPGA clock/reset controller is entirely user dependent, so a generic implementation is not possible. However, a generic driver is needed in order to build the current FPGA peripheral drivers. A stub implementation of the driver is provided in order to achieve this. Signed-off-by: Ville Juven <[email protected]>
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Thank you @pussuw :-)
Summary
This patch adds a driver framework to control individual FPGA reset and clock gates.
For FPGA devices, only the fabric (FIC0/FIC1/FIC3) clock and reset can be controlled, which affects the whole fabric / domain. This is problematic for obvious reasons.
For MSS peripherals, clocks and reset are controlled individually for each peripheral via MSS memory mapped registers (MPFS_SYSREG). To get the same capability for FPGA peripherals, the same controller needs to be fabricated on the FPGA.
However, the FPGA clock/reset controller is entirely user dependent, so a generic implementation is not possible. However, a generic driver is needed in order to build the current FPGA peripheral drivers. A stub implementation of the driver is provided in order to achieve this.
Impact
Only the MPFS target is impacted.
There is no app, documentation or build impact outside of MPFS scope.
If an FPGA reset controller is not used, the impact is none whatsoever.
Testing
Tested on downstream MPFS target board (not public)