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Fixup the boot EL check #10458

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Merged
merged 1 commit into from
Jul 7, 2025
+3 −3
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Fixup the boot EL check #10458

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6 changes: 3 additions & 3 deletions libcpu/aarch64/cortex-a/entry_point.S
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Original file line number Diff line number Diff line change
Expand Up @@ -180,13 +180,12 @@ init_cpu_el:

/* running at EL3? */
cmp x0, #3
bne .init_cpu_hyp
bne .init_cpu_hyp_test

/* should never be executed, just for completeness. (EL3) */
mov x1, #(1 << 0) /* EL0 and EL1 are in Non-Secure state */
orr x1, x1, #(1 << 4) /* RES1 */
orr x1, x1, #(1 << 5) /* RES1 */
/* bic x1, x1, #(1 << 7) disable Secure Monitor Call */
orr x1, x1, #(1 << 10) /* The next lower level is AArch64 */
msr scr_el3, x1

Expand All @@ -201,11 +200,12 @@ init_cpu_el:
msr elr_el3, x1
eret

.init_cpu_hyp:
.init_cpu_hyp_test:
/* running at EL2? */
cmp x0, #2 /* EL2 = 0b10 */
bne .init_cpu_sys

.init_cpu_hyp:
/* Enable CNTP for EL1 */
mrs x0, cnthctl_el2 /* Counter-timer Hypervisor Control register */
orr x0, x0, #(1 << 0) /* Don't traps NS EL0/1 accesses to the physical counter */
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