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Original file line number | Diff line number | Diff line change |
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Extending | ||
========= | ||
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1. Add support for the new tool: | ||
.. note:: | ||
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.. code-block:: python | ||
All <TOOL> classes inherit from ``Project`` (``project.py``). | ||
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This is a guide on how to add support for a new TOOL. | ||
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Add support for the new tool | ||
---------------------------- | ||
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.. code-block:: bash | ||
pyfpga/templates/<NEWTOOL>.jinja | ||
pyfpga/templates/<NEWTOOL>-prog.jinja | ||
pyfpga/<NEWTOOL>.py | ||
pyfpga/factory.py # UPDATE | ||
pyfpga/helpers/prj2bit.py # UPDATE | ||
2. Include the new tool on Factory: | ||
Add tests and a tool mock-up | ||
---------------------------- | ||
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.. code-block:: python | ||
.. code-block:: bash | ||
pyfpga/factory.py | ||
tests/test_tools.py # UPDATE | ||
tests/support.py # UPDATE if exceptions are needed | ||
tests/mocks/<NEWCOMMAND> | ||
3. Add tests and a tool mock-up: | ||
Add examples | ||
------------ | ||
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.. code-block:: python | ||
.. code-block:: bash | ||
tests/test_tools.py | ||
tests/mocks/<NEWTOOL_EXECUTABLE> | ||
examples/sources/cons/<NEWBOARD>/timing.<EXT> | ||
examples/sources/cons/<NEWBOARD>/clk.<EXT> | ||
examples/sources/cons/<NEWBOARD>/led.<EXT> | ||
examples/projects/<NEWTOOL>.py | ||
examples/projects/regress.sh # UPDATE | ||
examples/helpers/<NEWTOOL>.sh | ||
examples/hooks/<NEWTOOL>.py # OPTIONAL | ||
4. Updated the project's documentation: | ||
Verify the code | ||
--------------- | ||
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.. code-block:: python | ||
Run it at the root of the repo. | ||
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README.md | ||
docs | ||
.. code-block:: bash | ||
5. [OPTIONAL] Add examples: | ||
make docs | ||
make lint | ||
make test | ||
.. code-block:: python | ||
.. tip:: | ||
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examples/sources/cons/<NEWBOARD>/timing.<EXT> | ||
examples/sources/cons/<NEWBOARD>/clk.<EXT> | ||
examples/sources/cons/<NEWBOARD>/led.<EXT> | ||
examples/projects/<NEWTOOL>.py | ||
examples/hooks/<NEWTOOL>.py | ||
You can simply run ``make`` to perform all the operations. | ||
Running ``make clean`` will remove all the generated files. | ||
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Verify the functionality | ||
------------------------ | ||
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.. code-block:: bash | ||
cd examples/projects/ | ||
bash regress.sh <NEWTOOL> | ||
cd ../../tests/ | ||
python3 support.py --tool <NEWTOOL> | ||
Updated the documentation | ||
------------------------- | ||
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.. code-block:: bash | ||
README.md | ||
docs/intro.rst | ||
docs/tools.rst |
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#!/usr/bin/make | ||
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FILES = $(wildcard *.dot) | ||
FILES := $(basename $(FILES)) | ||
FILES := $(addsuffix .svg,$(FILES)) | ||
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ODIR = . | ||
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vpath %.svg $(ODIR) | ||
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%.svg: %.dot | ||
@mkdir -p $(ODIR) | ||
dot -Tsvg $< -o $(ODIR)/$@ | ||
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all: $(FILES) |
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digraph openflow { | ||
graph [ranksep=0.25]; | ||
node [shape = doublecircle]; | ||
node [shape = rectangle]; | ||
GHDL "ghdl-yosys-plugin" Yosys "nextpnr-ice40" "nextpnr-ecp5" icetime icepack iceprog eccpack; | ||
node [shape = note ]; | ||
VHDL Verilog; | ||
node [shape = box3d ]; | ||
ice40; | ||
node [shape = oval]; | ||
"bit-ice40" [label=".bit"]; | ||
"bit-ecp5" [label=".bit"]; | ||
VHDL -> {GHDL "ghdl-yosys-plugin"}; | ||
GHDL -> "ghdl-yosys-plugin"; | ||
"ghdl-yosys-plugin" -> Yosys; | ||
Verilog -> Yosys; | ||
Yosys -> ".json"; | ||
".json" -> {"nextpnr-ice40" "nextpnr-ecp5"}; | ||
"nextpnr-ice40" -> ".asc"; | ||
"nextpnr-ecp5" -> ".config"; | ||
".asc" -> {icetime icepack}; | ||
icepack -> "bit-ice40"; | ||
"bit-ice40" -> iceprog; | ||
iceprog -> ice40; | ||
".config" -> eccpack; | ||
eccpack -> "bit-ecp5"; | ||
{rank = same; GHDL ; "ghdl-yosys-plugin"; Yosys;} | ||
} |
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