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Pull requests: NationalSecurityAgency/ghidra

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Pull requests list

RISCV: fixed fmv.x.d
#6552 opened May 22, 2024 by Sleigh-InSPECtor Loading…
RISCV: NV and DZ float flags
#6551 opened May 22, 2024 by Sleigh-InSPECtor Loading…
Pcode test preprocessor improvements Status: Triage Information is being gathered
#6549 opened May 20, 2024 by antoniovazquezblanco Loading…
AArch32: (Thumb32) BranchWritePC does not clear bit-0 Feature: Processor/ARM Status: Triage Information is being gathered Type: Bug Something isn't working
#6545 opened May 20, 2024 by Sleigh-InSPECtor Loading…
RISCV: nanboxing Feature: Processor/RISC-V Status: Triage Information is being gathered
#6541 opened May 20, 2024 by Sleigh-InSPECtor Draft
AArch64: Switch register order in faddp 4H constructor Feature: Processor/AARCH64 Status: Triage Information is being gathered Type: Bug Something isn't working
#6539 opened May 19, 2024 by Sleigh-InSPECtor Loading…
AArch64: Prevent resize in general FMOV for 16 bit floats Feature: Processor/AARCH64 Status: Triage Information is being gathered Type: Bug Something isn't working
#6538 opened May 19, 2024 by Sleigh-InSPECtor Loading…
x86: Fix aliasing issues with SIMD instructions Feature: Processor/x86 Status: Triage Information is being gathered
#6524 opened May 16, 2024 by Sleigh-InSPECtor Loading…
x86: Fix evaluation order of CMOV Feature: Processor/x86 Status: Triage Information is being gathered
#6523 opened May 16, 2024 by Sleigh-InSPECtor Loading…
x86: Fix overlap issue with INCSS/RDSSP Feature: Processor/x86 Status: Triage Information is being gathered
#6520 opened May 16, 2024 by Sleigh-InSPECtor Loading…
RISCV: cleaned up fmin/fmax Feature: Processor/RISC-V Status: Triage Information is being gathered
#6518 opened May 16, 2024 by Sleigh-InSPECtor Loading…
RISCV: Implemented fclass Feature: Processor/RISC-V Status: Triage Information is being gathered
#6517 opened May 16, 2024 by Sleigh-InSPECtor Loading…
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