Merge pull request #300 from Gampyg28/d_P08

Add P08 Read Only support.
LegacyNsfw · Apr 23, 2023 · 8ddaa7a · 8ddaa7a
2 parents 920b99f + 42721b7
commit 8ddaa7a
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Showing 7 changed files with 49 additions and 6 deletions.
diff --git a/.github/workflows/CheckBuild.yml b/.github/workflows/CheckBuild.yml
@@ -50,7 +50,7 @@ jobs:
  # 2: Kernel Base Address
  # 3: Loader Base Address or NOLOADER if a loader is not used.
  #
- for p in "P04 FF9090 FF9890" "E54 FF8F50 NOLOADER"; do
+ for p in "P04 FF9090 FF9890" "P08 FFA800 FFB000" "E54 FF8F50 NOLOADER"; do
  pcm="${p%% *}";
  p="${p#* }"
  address="${p%% *}"

diff --git a/Apps/PcmHammer/MainForm.cs b/Apps/PcmHammer/MainForm.cs
@@ -865,7 +865,7 @@ private async void readPropertiesButton_Click(object sender, EventArgs e)
  }
 
  // Disable BCC lookup for the P04
- if (pcmInfo != null && pcmInfo.HardwareType != PcmType.P04)
+ if (pcmInfo != null && pcmInfo.HardwareType != PcmType.P04 && pcmInfo.HardwareType != PcmType.P08)
  {
  var bccResponse = await this.Vehicle.QueryBCC();
  if (bccResponse.Status == ResponseStatus.Success)

diff --git a/Apps/PcmLibrary/Misc/FileValidator.cs b/Apps/PcmLibrary/Misc/FileValidator.cs
@@ -184,6 +184,13 @@ public uint GetOsidFromImage()
  }
  break;
 
+ case PcmType.P08:
+ osid += image[0x8000] << 24;
+ osid += image[0x8001] << 16;
+ osid += image[0x8002] << 8;
+ osid += image[0x8003] << 0;
+ break;
+
  case PcmType.P10:
  osid += image[0x52E] << 24;
  osid += image[0x52F] << 16;
@@ -364,6 +371,14 @@ private PcmType ValidateSignatures()
  }
  }
 
+ // P08 512Kb
+ // Must be before P04, P08 can pass as a P04, P04 cannot pass as a P08
+ this.logger.AddDebugMessage("Trying P08 512Kb");
+ if ((image[0x7FFFC] == 0xA5) && (image[0x7FFFD] == 0x5A) && (image[0x7FFFE] == 0xA5) && (image[0x7FFFF] == 0xA5))
+ {
+ return PcmType.P08;
+ }
+
  // P04 512Kb
  this.logger.AddDebugMessage("Trying P04 512Kb");
  // Last 4 bytes:

diff --git a/Apps/PcmLibrary/Misc/PcmInfo.cs b/Apps/PcmLibrary/Misc/PcmInfo.cs
@@ -2098,6 +2098,29 @@ public PcmInfo(uint osid)
  //this.KernelMaxBlockSize = 4096;
  break;
 
+ // P08
+ case 9364970:
+ case 12206029:
+ this.Description = "P08";
+ this.IsSupported = false;
+ this.LoaderRequired = true;
+ this.ValidationMethod = PcmType.P08;
+ this.HardwareType = PcmType.P08;
+ this.KernelFileName = "Kernel-P08.bin";
+ this.KernelBaseAddress = 0xFFA800;
+ this.LoaderFileName = "Loader-P08.bin";
+ this.LoaderBaseAddress = 0xFFB000;
+ this.ImageBaseAddress = 0x0;
+ this.ImageSize = 512 * 1024;
+ //this.RAMSize = 0x4DFF;
+ this.KeyAlgorithm = 13;
+ this.ChecksumSupport = false;
+ this.FlashCRCSupport = true;
+ this.FlashIDSupport = true;
+ this.KernelVersionSupport = true;
+ //this.KernelMaxBlockSize = 4096;
+ break;
+
  // P10
  case 12213305:
  case 12571911:

diff --git a/Kernels/BuildAll.cmd b/Kernels/BuildAll.cmd
@@ -53,7 +53,8 @@ rem * They would need to be changed below.
 
 for %%A in (
  "-pP01 -aFF8000",
- "-pP04 -aFF9090 -lFF9890 -x"
+ "-pP04 -aFF9090 -lFF9890 -x",
+ "-pP08 -aFFA800 -lFFB000 -x",
  "-pP10 -aFFB800",
  "-pP12 -aFF2000",
  "-pE54 -aFF8F50 -x"

diff --git a/Kernels/Common-Assembly.h b/Kernels/Common-Assembly.h
@@ -9,13 +9,16 @@
 |
 
 | J1850 registers
-#if defined P01 || defined P10 || defined P12 || defined E54
+#if defined P01 || defined P08 || defined P10 || defined P12 || defined E54
  .equ J1850_Config, 0xFFF600
  .equ J1850_Command, 0xFFF60C
  .equ J1850_TX_FIFO, 0xFFF60D
  .equ J1850_Status, 0xFFF60E
  .equ J1850_RX_FIFO, 0xFFF60F
- #if defined P10
+ #if defined P08
+ .equ COP1, 0xFFFA27
+ .equ COP2, 0xFFC006
+ #elif defined P10
  .equ COP1, 0xFFFA27
  .equ COP2, 0x800806
  #elif defined P12

diff --git a/Kernels/Loader.S b/Kernels/Loader.S
@@ -154,7 +154,8 @@ ProcessMode36NextSum:
  lsl.l #8, %d3 | Logical Shift Left
  or.b (%a3)+, %d3 | Second byte
  cmp.l %d3, %d4 | Is the sum OK?
- beq.s ProcessMode36MemCopy | Do it
+ |beq.s ProcessMode36MemCopy | Do it 
+ bra.s ProcessMode36MemCopy | Temp hack to ignore Checksums, they work for P04, not P08
 
 | Process Mode36 Response Fail
  movea.l #Mode36Reply, %a0 | Mode 36 reply