This is a HighLevelAnalyzer for IO-Link communication and the Saleae Logic 2 Software. General information on HighLevelAnalyzers can be found at Saleae.
- Add the analyzer to Logic 2 from the extension window.
- Capture or load up a capture of IO-Link traffic. You need to capture the C/Q line (24V) directly. You cannot capture TX and RX independently between Transceiver and your uC.
- Add an "Async Serial" Analyzer with "Even Parity", "One Stop Bit", "LSB first", "Signal Inversion", and the Baudrate of your IO-Link device.
- COM1 = 4800
- COM2 = 38400
- COM3 = 230400
- Add the "IO Link" Analyzer with the "Async Serial" analyzer as source. Set the M-Sequence types for Type_1 and Type_2 frames. When Type_2_V is selected, you need to specifiy the Byte length of PDin, PDout, and OD. If you don't know the capabilities of your device, try to capture the reading of the "M-Sequency Capabilities" field from DirectParameter Page 1 during the Startup Phase and look up the corresponding lengths in the IO-Link specification.
The "examples" folder contains a IO-Link capture with the settings "Type_1_V (8 OD)", "Type_2_V", "PDout length" = 0, "PDin length" = 4, "OD length" = 2.
- Combine UART frames into IO-Link frames in adherence to the timing requirements of the IO-Link specification
- minor changes
- Initial version
- Support of all M-Sequence types
- Parsing of all frame fields
- Checksum tests for CKS and CKT
- DirectParameterPage accesses printed to console
- Parsing of predefined MasterCommands and SystemCommands
Things that are (currently) not supported:
- Interleaved mode
- Parsing of ISDU requests
- Anything else I didn't think of...