This project is part of the NCKU CSIE Computer Architecture course. It focuses on implementing core mathematical functions and file operations using only the RV32I instruction set of the RISC-V architecture. The goal is to enhance understanding of low-level operations and improve efficiency in RISC-V programming.
Run the following command to download necessary tools:
$ bash tools/download_tools.shRun the simulator using:
$ java -jar tools/venus.jar . -dmIn the Venus web terminal, execute:
$ mount local labsIn your browser, you may see a prompt saying Key has been shown in the Venus mount server! Please copy and paste it into here.. You should be able to see a key in the most recent line of your local terminal output; just copy and paste it into the dialog.
For more detailed steps and troubleshooting, please refer to Lab 3: RISC-V, Venus.
commit cecbee4
According to the assignment requirements：
you must use only RV32I instructions; instructions from the M extension are not allowed.
Therefore, I used repeated addition and subtraction to perform the multiplication operation in the dot product calculation.
When I conducted the tests, I found that some test cases failed to pass:
| Test Case | Status |
|---|---|
| test_abs_minus_one | ✅ Pass |
| test_abs_one | ✅ Pass |
| test_argmax_invalid_n | ✅ Pass |
| test_chain_1 | ❌ Fail |
| test_classify_3_print | ❌ Fail |
Problem: The initial implementation of the dot product used elements of the second vector as the loop count. If any element was zero, the loop failed, causing incorrect results.
Debugging Process:
- Added additional test cases where elements in the second vector included zeros.
- Analyzed the loop logic and identified that zero values caused premature loop termination.
Solution: Refactored the loop to handle zero elements correctly, ensuring that all test cases pass. The updated logic can be found in commit 765ecf1.
- Current Issue: The repeated addition/subtraction approach for multiplication causes excessive looping.
- Proposed Solution: Optimize loop structure and investigate alternative implementations.