rename project

stevej · Nov 6, 2024 · 2029de7 · 2029de7
1 parent 68128bb
commit 2029de7
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Showing 4 changed files with 3 additions and 3 deletions.
diff --git a/info.yaml b/info.yaml
@@ -18,7 +18,7 @@ project:
   # Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
   source_files:
     - "project.v"
-    - "lfsr.sv"
+    - "tt_um_lfsr_stevej.sv"
 
 # The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
 pinout:

diff --git a/src/project.v b/src/project.v
@@ -5,7 +5,7 @@
 
 `default_nettype none
 
-`include "lfsr.sv"
+`include "tt_um_lfsr_stevej.sv"
 
 module tt_um_example (
     input  wire [7:0] ui_in,    // Dedicated inputs

diff --git a/src/lfsr.sv → src/tt_um_lfsr_stevej.sv b/src/lfsr.sv → src/tt_um_lfsr_stevej.sv
diff --git a/test/Makefile b/test/Makefile
@@ -5,7 +5,7 @@
 SIM ?= icarus
 TOPLEVEL_LANG ?= verilog
 SRC_DIR = $(PWD)/../src
-PROJECT_SOURCES = project.v lfsr.sv
+PROJECT_SOURCES = project.v tt_um_lfsr_stevej.sv
 
 ifneq ($(GATES),yes)