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assembler: register inconsistency #562
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The reason that the disassembler has these limits is because that is what the instruction encoding supports and what a compiler could produce. The verifier then narrows it down to what the vm actually supports. |
Ah yes you are right, let me fix that |
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Hi,
The register checking of assembler should be consistent with that of verifier
!(0..16).contains(&dst)
->dst < 0 || dst > 11
or ...dst < 0 || src >= 16
->src < 0 || src > 10
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