Share round counter in core for w scheduling

Signed-off-by: Joachim Strömbergson <[email protected]>

Author: secworks

src/rtl/sha256_core.v

@@ -157,6 +157,7 @@ module sha256_core(
 
   reg           w_init;
   reg           w_next;
+  reg [5 : 0]   w_round;
   wire [31 : 0] w_data;
 
 
@@ -174,6 +175,7 @@ module sha256_core(
                           .reset_n(reset_n),
 
                           .block(block),
+                          .round(t_ctr_reg),
 
                           .init(w_init),
                           .next(w_next),

src/rtl/sha256_w_mem.v

@@ -44,6 +44,7 @@ module sha256_w_mem(
                     input wire           reset_n,
 
                     input wire [511 : 0] block,
+                    input wire [5 : 0]   round,
 
                     input wire           init,
                     input wire           next,
@@ -73,10 +74,6 @@ module sha256_w_mem(
   reg [31 : 0] w_mem15_new;
   reg          w_mem_we;
 
-  reg [5 : 0] w_ctr_reg;
-  reg [5 : 0] w_ctr_new;
-  reg         w_ctr_we;
-
 
   //----------------------------------------------------------------
   // Wires.
@@ -103,10 +100,9 @@ module sha256_w_mem(
 
       if (!reset_n)
         begin
-          for (i = 0 ; i < 16 ; i = i + 1)
+          for (i = 0 ; i < 16 ; i = i + 1) begin
             w_mem[i] <= 32'h0;
-
-          w_ctr_reg <= 6'h0;
+	  end
         end
       else
         begin
@@ -129,9 +125,6 @@ module sha256_w_mem(
               w_mem[14] <= w_mem14_new;
               w_mem[15] <= w_mem15_new;
             end
-
-          if (w_ctr_we)
-            w_ctr_reg <= w_ctr_new;
         end
     end // reg_update
 
@@ -144,8 +137,8 @@ module sha256_w_mem(
   //----------------------------------------------------------------
   always @*
     begin : select_w
-      if (w_ctr_reg < 16)
-        w_tmp = w_mem[w_ctr_reg[3 : 0]];
+      if (round < 16)
+        w_tmp = w_mem[round[3 : 0]];
       else
         w_tmp = w_new;
     end // select_w
@@ -220,7 +213,7 @@ module sha256_w_mem(
           w_mem_we    = 1;
         end
 
-      if (next && (w_ctr_reg > 15))
+      if (next && (round > 15))
         begin
           w_mem00_new = w_mem[01];
           w_mem01_new = w_mem[02];
@@ -241,30 +234,6 @@ module sha256_w_mem(
           w_mem_we    = 1;
         end
     end // w_mem_update_logic
-
-
-  //----------------------------------------------------------------
-  // w_ctr
-  // W schedule adress counter. Counts from 0x10 to 0x3f and
-  // is used to expand the block into words.
-  //----------------------------------------------------------------
-  always @*
-    begin : w_ctr
-      w_ctr_new = 6'h0;
-      w_ctr_we  = 1'h0;
-
-      if (init)
-        begin
-          w_ctr_new = 6'h0;
-          w_ctr_we  = 1'h1;
-        end
-
-      if (next)
-        begin
-          w_ctr_new = w_ctr_reg + 6'h01;
-          w_ctr_we  = 1'h1;
-        end
-    end // w_ctr
 endmodule // sha256_w_mem
 
 //======================================================================

src/tb/tb_sha256_w_mem.v

@@ -57,6 +57,7 @@ module tb_sha256_w_mem();
   reg           tb_init;
   reg           tb_next;
   reg [511 : 0] tb_block;
+  reg [5 : 0]   tb_round;
   wire [31 : 0] tb_w;
 
   reg [63 : 0] cycle_ctr;
@@ -72,6 +73,7 @@ module tb_sha256_w_mem();
                    .reset_n(tb_reset_n),
 
                    .block(tb_block),
+                   .round(tb_round),
 
                    .init(tb_init),
                    .next(tb_next),
@@ -108,7 +110,7 @@ module tb_sha256_w_mem();
 
       if (DEBUG)
         begin
-          $display("dut w_ctr      = %02x:", dut.w_ctr_reg);
+          $display("dut round      = %02x:", dut.round);
           $display("dut w_tmp      = %02x:", dut.w_tmp);
           dump_w_state();
         end
@@ -167,6 +169,7 @@ module tb_sha256_w_mem();
 
       tb_init = 0;
       tb_block = 512'h0;
+      tb_round = 6'h0;
     end
   endtask // reset_dut
 
@@ -178,16 +181,22 @@ module tb_sha256_w_mem();
   // Note: Currently not a self checking test case.
   //----------------------------------------------------------------
   task test_w_schedule;
-    begin
+    begin : test_w_schedule
+      integer i;
       $display("*** Test of W schedule processing. --");
       tb_block = 512'h61626380000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018;
       tb_init = 1;
       #(4 * CLK_HALF_PERIOD);
       tb_init = 0;
       dump_w_state();
 
-      tb_next = 1;
-      #(150 * CLK_HALF_PERIOD);
+      tb_round = 0;
+      for (i = 0 ; i < 64 ; i = i + 1) begin
+	#(2 * CLK_HALF_PERIOD);
+	tb_round = tb_round + 1;
+      end
+
+      dump_w_state();
     end
   endtask // test_w_schedule