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Add RzIL chapter and various small changes. (#131)
* Don't use hardcoded links. * Update output in ioplugins.md * Small update of macros.md chapter
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_quarto.yml

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chapters:
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- src/disassembling/intro.md
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- src/disassembling/adding_metadata.md
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- src/disassembling/rzil.md
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- src/disassembling/esil.md
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- part: "Analysis"

src/analysis/emulation.md

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Thus, many professional reverse engineering tools use code emulation while
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performing an analysis of binary code, and Rizin is no different here.
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For partial emulation (or imprecise full emulation) Rizin uses its own RzIL intermediate language, designed
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For partial emulation (or imprecise full emulation) Rizin uses its own [RzIL intermediate language](../disassembling/rzil.md), designed
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to replace current [ESIL](../disassembling/esil.md).
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Rizin supports this kind of partial emulation for all platforms that

src/basic_commands/print_modes.md

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### Print gadgets
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In Rizin, visual gadgets allows the users to cast or display the output of a particular Rizin command anywhere on the
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screen while in Visual mode. This command is unrelated with displaying [ROP Gadgets](https://book.rizin.re/refcard/intro.html#searching).
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screen while in Visual mode. This command is unrelated with displaying [ROP Gadgets](../refcard/intro.html#searching).
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Using the commands under `pg` (print gadgets), we can add, remove and change the location of these visual gadgets.
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You can add a gadget using `pg`:

src/configuration/evars.md

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### scr.scrollbar: `bool`
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When you have configured any [flagzones](http://book.rada.re/basic_commands/flags.html#flag-zones) (`fz?`), the `scr.scrollbar` variable facilitates the display of the scrollbar alongside the flagzones in Visual mode. Set it to `1` for displaying the scrollbar at the right end, `2` for the top, and `3` to position it at the bottom.
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When you have configured any [flagzones](../basic_commands/flags.html#flag-zones) (`fz?`), the `scr.scrollbar` variable facilitates the display of the scrollbar alongside the flagzones in Visual mode. Set it to `1` for displaying the scrollbar at the right end, `2` for the top, and `3` to position it at the bottom.
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### scr.utf8: `bool`
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src/disassembling/rzil.md

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# RzIL
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RzIL is the new intermediate language in Rizin, primarily intended for representing the semantics of machine code. It is designed as a clone of BAP's [Core Theory](http://binaryanalysisplatform.github.io/bap/api/master/bap-core-theory/Bap_core_theory/), with minor deviations where necessary; it is worth noting that in practice, RzIL is very similar to the SMT representation with bitvectors and bitvector-indexed arrays as well as effects.
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More details related to the implementation can be found [here](https://github.com/rizinorg/rizin/blob/dev/doc/rzil.md).
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## IL statements
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Instructions can are internally represented as [IL statements](https://github.com/rizinorg/rizin/blob/dev/librz/include/rz_il/rz_il_opcodes.h); these statements are expressed as **s-expressions** (symbolic expression) which utilize LISP-like syntax as string format.
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- `aoi` generates a **one-line** LISP-like syntax (JSON format is available via `aoj` command).
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- `aoip` generates a **prettified** LISP-like syntax
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Here an example using `aoip` (the *prettified* output) of two PowerPC instructions (`stwu` and `mflr`).
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```bash
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[0x10000488]> pd 2
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| 0x10000488 stwu r1, -0x10(r1)
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| 0x1000048c mflr r0
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[0x10000488]> aoi?
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Usage: aoi[p] # Print the RzIL of next N instructions
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| aoi [<n_instructions>] # Print the RzIL of next N instructions
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| aoip [<n_instructions>] # Pretty print the RzIL of next N instructions
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[0x10000488]> aoip 2
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0x10000488
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(seq
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(storew 0
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(+
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(var r1)
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(let v
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(bv 16 0xfff0)
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(ite
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(msb
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(var v))
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(cast 32
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(msb
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(var v))
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(var v))
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(cast 32
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false
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(var v)))))
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(cast 32
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false
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(var r1)))
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(set r1
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(+
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(var r1)
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(let v
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(bv 16 0xfff0)
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(ite
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(msb
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(var v))
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(cast 32
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(msb
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(var v))
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(var v))
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(cast 32
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false
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(var v)))))))
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0x1000048c
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(set r0
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(cast 32
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false
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(var lr)))
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```
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The `plf` command allows to generate an in-line representation of the entire function in s-expressions.
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```bash
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[0x100002bc]> pdf @ sym.example
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/ sym.example();
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| ; var int32_t var_1ch @ stack - 0x1c
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| 0x1000044c stwu r1, -0x10(r1)
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| 0x10000450 mflr r0
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| 0x10000454 stw r0, 0x14(r1)
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| 0x10000458 lwz r0, 0x14(r1)
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| 0x1000045c addi r1, r1, 0x10
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| 0x10000460 mtlr r0
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\ 0x10000464 blr
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[0x100002bc]> plf @ sym.example
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0x1000044c (seq (storew 0 (+ (var r1) (let v (bv 16 0xfff0) (ite (msb (var v)) (cast 32 (msb (var v)) (var v)) (cast 32 false (var v))))) (cast 32 false (var r1))) (set r1 (+ (var r1) (let v (bv 16 0xfff0) (ite (msb (var v)) (cast 32 (msb (var v)) (var v)) (cast 32 false (var v)))))))
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0x10000450 (set r0 (cast 32 false (var lr)))
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0x10000454 (seq (storew 0 (+ (var r1) (let v (bv 16 0x14) (ite (msb (var v)) (cast 32 (msb (var v)) (var v)) (cast 32 false (var v))))) (cast 32 false (var r0))) empty)
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0x10000458 (seq (set r0 (let ea (+ (var r1) (let v (bv 16 0x14) (ite (msb (var v)) (cast 32 (msb (var v)) (var v)) (cast 32 false (var v))))) (let loadw (loadw 0 32 (var ea)) (cast 32 false (var loadw))))) empty)
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0x1000045c (seq (set a (var r1)) (set b (let v (bv 16 0x10) (ite (msb (var v)) (cast 32 (msb (var v)) (var v)) (cast 32 false (var v))))) empty (set r1 (+ (var a) (var b))) empty empty empty)
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0x10000460 (set lr (cast 32 false (var r0)))
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0x10000464 (seq (set CIA (bv 32 0x10000464)) empty empty (set NIA (& (bv 32 0xfffffffc) (var lr))) (jmp (var NIA)))
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[0x100002bc]>
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```
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The same output of `aoi` can be obtained via `rz-asm` like this:
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```bash
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$ rz-asm -de -a ppc 7c0802a6
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mflr r0
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$ rz-asm -Ie -a ppc 7c0802a6
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(set r0 (cast 32 false (var lr)))
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```
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## Emulation
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Rizin enables instruction emulation by leveraging RzIL. The emulation can be used to record changes within the VM, like read and writes of registers and memory locations (`e io.buffers=true` is required for memory ops). The emulation is controlled via the `aez` commands.
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```bash
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[0x00000000]> aez?
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Usage: aez<isv?> # RzIL Emulation
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| aezi # Initialize the RzIL Virtual Machine at the current offset
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| aezs [<n_times>] # Step N instructions within the RzIL Virtual Machine
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| aezse[j] [<n_times>] # Step N instructions within the RzIL VM and output VM changes (read &
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write)
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| aezsu <address> # Step until PC equals given address
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| aezsue <address> # Step until PC equals given address and output VM changes (read & write)
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| aezv[jqt] [<var_name> [<number>]] # Print or modify the current status of the RzIL Virtual Machine
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```
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Supported architectures can be inspected via the `La` command. If the architecture has an `I`, as in the example below, it supports RzIL.
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```bash
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_dAeI 32 64 ppc BSD Capstone PowerPC disassembler
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```
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Here is an example of emulation of a PowerPC binary printing a string via *printf*.
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In this example, `r9` contains the base address which is used to calculate the pointer to the string (stored in `r3`) used by 'reloc.printf'.
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```bash
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[0x1000049c]> pd 3
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| 0x1000049c lis r9, 0x1000
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| 0x100004a0 addi r3, r9, 0x640
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| 0x100004a4 bl reloc.printf
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```
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First we need to initialize the RzIL Virtual Machine at the current offset using `aezi`
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```bash
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[0x1000049c]> aezi?
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Usage: aezi # Initialize the RzIL Virtual Machine at the current offset
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[0x1000049c]> aezi
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```
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Then we execute 2 instructions via `aezs` (quiet) or use `aezse` to see the actual changes within the RzIL VM.
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```bash
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[0x1000049c]> aezse?
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Usage: aezse[j] [<n_times>] # Step N instructions within the RzIL VM and output VM changes (read & write)
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[0x1000049c]> aezse 2 # execute 2 instructions
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pc_write(old: 0x1000049c, new: 0x100004a0)
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var_write(name: r9, old: 0x0, new: 0x10000000)
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pc_write(old: 0x100004a0, new: 0x100004a4)
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var_write(name: r3, old: 0x0, new: 0x10000640)
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```
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It's possible to see (or modify) the values of the registers in the RzIL VM via `aezv`.
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```bash
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[0x1000049c]> # We can also print the content of the RzIL VM via 'aezv'
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[0x1000049c]> aezv?
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Usage: aezv[jqt] [<var_name> [<number>]] # Print or modify the current status of the RzIL Virtual Machine
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[0x1000049c]> aezv r3
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r3: 0x10000640
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[0x1000049c]> aezv r9
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r9: 0x10000000
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```
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Now that we know that the string is situated at `0x10000640`, we can print it.
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```bash
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[0x1000049c]> # hexdump the content of address 0x10000640 with a buffer size of 0x20 bytes.
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[0x1000049c]> px @ 0x10000640 @! 0x20
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- offset - 0 1 2 3 4 5 6 7 8 9 A B C D E F 0123456789ABCDEF
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0x10000640 5369 6d70 6c65 2050 5043 2070 726f 6772 Simple PPC progr
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0x10000650 616d 2e00 0000 0000 ffff ffff ffff ffff am..............
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[0x1000049c]>
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[0x1000049c]> # Decode and print the utf-8 string at address 0x10000640
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[0x1000049c]> ps @ 0x10000640
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Simple PPC program.
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[0x1000049c]>
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```

src/plugins/ioplugins.md

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You can get a list of the rizin IO plugins by typing `rizin -L`:
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```
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$ rizin -L
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rw_ ar Open ar/lib files [ar|lib]://[file//path] (LGPL3)
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rw_ bfdbg BrainFuck Debugger (bfdbg://path/to/file) (LGPL3)
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rwd bochs Attach to a BOCHS debugger (LGPL3)
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r_d debug Native debugger (dbg:///bin/ls dbg://1388 pidof:// waitfor://) (LGPL3) v0.2.0 pancake
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rw_ default open local files using def_mmap:// (LGPL3)
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rwd gdb Attach to gdbserver, 'qemu -s', gdb://localhost:1234 (LGPL3)
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rw_ gprobe open gprobe connection using gprobe:// (LGPL3)
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rw_ gzip read/write gzipped files (LGPL3)
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rw_ http http get (http://rada.re/) (LGPL3)
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rw_ ihex Intel HEX file (ihex://eeproms.hex) (LGPL)
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rw_ ar Open ar/lib files (LGPL3) ar://,lib:// xarkes
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rw_ bfdbg Attach to brainfuck Debugger instance (LGPL3) bfdbg://
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rwd bochs Attach to a BOCHS debugger instance (LGPL3) bochs://
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r_d debug Attach to native debugger instance (LGPL3) dbg://,pidof://,waitfor:// v0.2.0 pancake
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rw_ default Open local files (LGPL3) file://,nocache://
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rw_ dmp Debug a Windows DMP file (LGPL3) dmp://
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rw_ fd Local process filedescriptor IO (MIT) fd://
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rwd gdb Attach to gdbserver instance (LGPL3) gdb://
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rw_ gzip Read/write gzipped files (LGPL3) gzip://
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rw_ http Make http get requests (LGPL3) http://
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rw_ ihex Open intel HEX file (LGPL) ihex://
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r__ mach mach debug io (unsupported in this platform) (LGPL)
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rw_ malloc memory allocation (malloc://1024 hex://cd8090) (LGPL3)
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rw_ mmap open file using mmap:// (LGPL3)
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rw_ null null-plugin (null://23) (LGPL3)
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rw_ procpid /proc/pid/mem io (LGPL3)
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rwd ptrace ptrace and /proc/pid/mem (if available) io (LGPL3)
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rwd qnx Attach to QNX pdebug instance, qnx://host:1234 (LGPL3)
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rw_ rzk kernel access API io (rzk://) (LGPL3)
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rw_ rz-pipe rz-pipe io plugin (MIT)
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rw_ rzweb rzweb io client (rzweb://cloud.rada.re/cmd/) (LGPL3)
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rw_ rap rizin network protocol (rap://:port rap://host:port/file) (LGPL3)
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rw_ rbuf RBuffer IO plugin: rbuf:// (LGPL)
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rw_ self read memory from myself using 'self://' (LGPL3)
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rw_ shm shared memory resources (shm://key) (LGPL3)
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rw_ sparse sparse buffer allocation (sparse://1024 sparse://) (LGPL3)
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rw_ tcp load files via TCP (listen or connect) (LGPL3)
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rwd windbg Attach to a KD debugger (windbg://socket) (LGPL3)
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rwd winedbg Wine-dbg io and debug.io plugin for rizin (MIT)
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rw_ zip Open zip files [apk|ipa|zip|zipall]://[file//path] (BSD)
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rw_ malloc Memory allocation plugin (LGPL3) malloc://,hex://
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rw_ null Null plugin (LGPL3) null://
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rw_ procpid Open /proc/[pid]/mem io (LGPL3) procpid://
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rwd ptrace Ptrace and /proc/pid/mem (if available) io plugin (LGPL3) ptrace://,attach://
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rwd qnx Attach to QNX pdebug instance (LGPL3) qnx://
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rw_ rap Remote binary protocol plugin (MIT) rap://,raps://
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rw_ rzpipe rzpipe io plugin (MIT) rzpipe://
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rw_ rzweb rzweb io client plugin (LGPL3) rzweb://
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rw_ self Read memory from self (LGPL3) self://
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rw_ shm Shared memory resources plugin (MIT) shm://
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rw_ sparse Sparse buffer allocation plugin (LGPL3) sparse://
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rw_ srec Motorola S-record file format (LGPL-3) srec://
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rw_ tcp Load files via TCP (listen or connect) (LGPL3) tcp://
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rw_ vfile Virtual Files provided by RzBin Files (LGPL) vfile://
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rwd winedbg Wine-dbg io and debug.io plugin (MIT) winedbg://
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rwd winkd Attach to a KD debugger (LGPL3) winkd://
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rw_ zip Open zip files (BSD) zip://,apk://,ipa://,jar://,zipall://,apkall://,ipaall://,jarall://
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```

src/scripting/macros.md

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# Macros
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Apart from simple sequencing and looping, Rizin allows to write simple macros, using this construction:
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Rizin allows to write simple macros via command `(`; A macro is essentially a pre-recorded set of instructions that automates tasks.
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```
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[0x00000000]> (?
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Usage: ([*-?] # Manage scripting macros
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| ([*] # List all defined macros
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| (-<macro-name> # Remove a defined macro named <macro-name>
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| (<macro-name> [<macro-arg0> <macro-arg1> ...][; <cmds>])[([<macro-call-arg0> <macro-call-arg1> ...])] # Add a new macro <macro-name>
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| (<macro-name> [<macro-arg0> <macro-arg1> ...][; <cmds>])[([<macro-call-arg0> <macro-call-arg1> ...])] # Define a macro <macro-name> and call it with the arguments
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<macro-call-args>
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| .(<macro-name> [<macro-call-arg0> <macro-call-arg1> ...]) # Call macro <macro-name> with the arguments <macro-call-args>
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| ..(<macro-name> [<macro-call-arg0> <macro-call-arg1> ...]) # Call macro <macro-name> multiple times with the arguments <macro-call-args>
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```
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Example of macro usage named `qwe`:
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```
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[0x00404800]> (qwe; pd 4; ao)
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```
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This will define a macro called 'qwe' which runs sequentially first 'pd 4' then 'ao'.
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This will define a macro called `qwe` which runs sequentially first `pd 4` then `ao`.
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Calling the macro using syntax `.(macro)` is simple:
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```
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(qwe ; pd 4; ao)
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```
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And if you want to remove some macro, just add '-' before the name:
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And if you want to remove some macro, just add `-` before the name:
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```
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[0x00404800]> (-qwe)
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Macro 'qwe' removed.
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[0x00404800]> (-qwe
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[0x00404800]>
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```
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# Aliases
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Rizin also offers aliases which might help you save time by quickly executing your most used commands.
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They are under `$?`.
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Rizin also offers aliases which might help you save time by quickly executing your most used commands; they are under the command `$?`.
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```
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[0x00000000]> $?
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Usage: $[*?] # Alias commands and strings
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| $[alias[=cmd] [args...]] # List all defined aliases / Define alias (see %$? for help on $variables)
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| $* # List all the aliases as rizin commands in base64
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| $** # Same as above, but using plain text
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Detailed help for $[alias[=cmd] [args...]] is provided by $??.
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```
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The general usage of the feature is: `$alias=cmd`
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