1
1
;*
2
2
;* Gameboy Hardware definitions
3
+ ;* https://github.com/gbdev/hardware.inc
3
4
;*
4
5
;* Based on Jones' hardware.inc
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6
;* And based on Carsten Sorensen's ideas.
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;*
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+ ;* To the extent possible under law, the authors of this work have
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+ ;* waived all copyright and related or neighboring rights to the work.
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+ ;* See https://creativecommons.org/publicdomain/zero/1.0/ for details.
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+ ;*
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+ ;* SPDX-License-Identifier: CC0-1.0
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+ ;*
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;* Rev 1.1 - 15-Jul-97 : Added define check
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;* Rev 1.2 - 18-Jul-97 : Added revision check macro
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16
;* Rev 1.3 - 19-Jul-97 : Modified for RGBASM V1.05
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34
;* Rev 3.0 - 27-Aug-20 : Register ordering, byte-based sizes, OAM additions, general cleanup (Blitter Object)
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35
;* Rev 4.0 - 03-May-21 : Updated to use RGBDS 0.5.0 syntax, changed IEF_LCDC to IEF_STAT (Eievui)
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;* Rev 4.1 - 16-Aug-21 : Added more flags, bit number defines, and offset constants for OAM and window positions (rondnelson99)
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+ ;* Rev 4.2 - 04-Sep-21 : Added CH3- and CH4-specific audio registers flags (ISSOtm)
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+ ;* Rev 4.3 - 07-Nov-21 : Deprecate VRAM address constants (Eievui)
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+ ;* Rev 4.4 - 11-Jan-22 : Deprecate VRAM CART_SRAM_2KB constant (avivace)
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+ ;* Rev 4.5 - 03-Mar-22 : Added bit number definitions for OCPS, BCPS and LCDC (sukus)
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+ ;* Rev 4.6 - 15-Jun-22 : Added MBC3 registers and special values
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+ ;* Rev 4.7.0 - 27-Jun-22 : Added alternate names for some constants
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+ ;* Rev 4.7.1 - 05-Jul-22 : Added RPB_LED_ON constant
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+ ;* Rev 4.8.0 - 25-Oct-22 : Changed background addressing constants (zlago)
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+ ;* Rev 4.8.1 - 29-Apr-23 : Added rOPRI (rbong)
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+ ;* Rev 4.9.0 - 24-Jun-23 : Added definitions for interrupt vectors (sukus)
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+ ;* Rev 4.9.1 - 11-Sep-23 : Added repository link and CC0 waiver notice
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+
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+
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+ ; NOTE: REVISION NUMBER CHANGES MUST BE REFLECTED
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+ ; IN `rev_Check_hardware_inc` BELOW!
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IF __RGBDS_MAJOR__ == 0 && __RGBDS_MINOR__ < 5
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FAIL "This version of ' hardware. inc ' requires RGBDS version 0.5.0 or later."
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IF !DEF(HARDWARE_INC)
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DEF HARDWARE_INC EQU 1
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+ ; Usage: rev_Check_hardware_inc <min_ver>
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+ ; Examples: rev_Check_hardware_inc 4.1.2
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+ ; rev_Check_hardware_inc 4.1 (equivalent to 4.1.0)
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+ ; rev_Check_hardware_inc 4 (equivalent to 4.0.0)
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MACRO rev_Check_hardware_inc
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- ;NOTE: REVISION NUMBER CHANGES MUST BE ADDED
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- ;TO SECOND PARAMETER IN FOLLOWING LINE.
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- IF \1 > 4 .1 ;PUT REVISION NUMBER HERE
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- WARN "Version \1 or later of 'hardware.inc' is required."
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+ DEF CUR_VER equs "4,9,1" ; ** UPDATE THIS LINE WHEN CHANGING THE REVISION NUMBER **
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+
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+ DEF MIN_VER equs STRRPL( "\1" , "." , "," )
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+ DEF INTERNAL_CHK equs "" "MACRO ___internal
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+ IF \\ 1 != \\ 4 || \\ 2 < \\ 5 || (\\ 2 == \\ 5 && \\ 3 < \\ 6 )
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+ FAIL "Version \\1.\\2.\\3 of ' hardware. inc ' is incompatible with requested version \\4.\\5.\\6"
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ENDC
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+ \nENDM "" "
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+ INTERNAL_CHK
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+ ___internal {CUR_VER} , {MIN_VER} , 0 , 0
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+ PURGE CUR_VER , MIN_VER , INTERNAL_CHK , ___internal
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ENDM
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+
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+ ;***************************************************************************
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+ ;*
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+ ;* General memory region constants
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+ ;*
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+ ;***************************************************************************
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+
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DEF _VRAM EQU $ 8000 ; $8000->$9FFF
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- DEF _VRAM8000 EQU _VRAM
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- DEF _VRAM8800 EQU _VRAM+$800
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- DEF _VRAM9000 EQU _VRAM+$1000
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DEF _SCRN0 EQU $ 9800 ; $9800->$9BFF
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DEF _SCRN1 EQU $ 9C00 ; $9C00->$9FFF
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DEF _SRAM EQU $ A000 ; $A000->$BFFF
@@ -59,17 +95,80 @@ DEF _IO EQU $FF00 ; $FF00->$FF7F,$FFFF
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DEF _AUD3WAVERAM EQU $ FF30 ; $FF30->$FF3F
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DEF _HRAM EQU $ FF80 ; $FF80->$FFFE
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- ; *** MBC5 Equates ***
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- DEF rRAMG EQU $0000 ; $0000->$1fff
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- DEF rROMB0 EQU $2000 ; $2000->$2fff
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- DEF rROMB1 EQU $3000 ; $3000->$3fff - If more than 256 ROM banks are present.
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- DEF rRAMB EQU $4000 ; $4000->$5fff - Bit 3 enables rumble (if present)
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+ ;***************************************************************************
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+ ;*
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+ ;* MBC registers
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+ ;*
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+ ;***************************************************************************
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+
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+ ; *** Common ***
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+
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+ ; --
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+ ; -- RAMG ($0000-$1FFF)
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+ ; -- Controls whether access to SRAM (and the MBC3 RTC registers) is allowed (W)
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+ ; --
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+ DEF rRAMG EQU $ 0000
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+
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+ DEF CART_SRAM_ENABLE EQU $ 0A
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+ DEF CART_SRAM_DISABLE EQU $ 00
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+
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+
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+ ; --
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+ ; -- ROMB0 ($2000-$3FFF)
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+ ; -- Selects which ROM bank is mapped to the ROMX space ($4000-$7FFF) (W)
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+ ; --
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+ ; -- The range of accepted values, as well as the behavior of writing $00,
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+ ; -- varies depending on the MBC.
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+ ; --
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+ DEF rROMB0 EQU $ 2000
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+
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+ ; --
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+ ; -- RAMB ($4000-$5FFF)
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+ ; -- Selects which SRAM bank is mapped to the SRAM space ($A000-$BFFF) (W)
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+ ; --
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+ ; -- The range of accepted values varies depending on the cartridge configuration.
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+ ; --
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+ DEF rRAMB EQU $ 4000
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+
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+
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+ ; *** MBC3-specific registers ***
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+
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+ ; Write one of these to rRAMG to map the corresponding RTC register to all SRAM space
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+ DEF RTC_S EQU $ 08 ; Seconds (0-59)
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+ DEF RTC_M EQU $ 09 ; Minutes (0-59)
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+ DEF RTC_H EQU $ 0A ; Hours (0-23)
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+ DEF RTC_DL EQU $ 0B ; Lower 8 bits of Day Counter ($00-$FF)
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+ DEF RTC_DH EQU $ 0C ; Bit 7 - Day Counter Carry Bit (1=Counter Overflow)
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+ ; Bit 6 - Halt (0=Active, 1=Stop Timer)
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+ ; Bit 0 - Most significant bit of Day Counter (Bit 8)
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+
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+
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+ ; --
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+ ; -- RTCLATCH ($6000-$7FFF)
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+ ; -- Write $00 then $01 to latch the current time into the RTC registers (W)
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+ ; --
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+ DEF rRTCLATCH EQU $ 6000
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+
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+
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+ ; *** MBC5-specific register ***
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+
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+ ; --
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+ ; -- ROMB1 ($3000-$3FFF)
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+ ; -- A 9th bit that "extends" ROMB0 if more than 256 banks are present (W)
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+ ; --
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+ ; -- Also note that rROMB0 thus only spans $2000-$2FFF.
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+ ; --
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+ DEF rROMB1 EQU $ 3000
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+
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+
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+ ; Bit 3 of RAMB enables the rumble motor (if any)
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+ DEF CART_RUMBLE_ON EQU 1 << 3
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;***************************************************************************
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;*
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- ;* Custom registers
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+ ;* Memory-mapped registers
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;*
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;***************************************************************************
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@@ -104,9 +203,9 @@ DEF rSB EQU $FF01
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; --
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DEF rSC EQU $ FF02
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- DEF SCF_START EQU %10000000 ;Transfer Start Flag (1=Transfer in progress, or requested)
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- DEF SCF_SPEED EQU %00000010 ;Clock Speed (0=Normal, 1=Fast) ** CGB Mode Only **
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- DEF SCF_SOURCE EQU %00000001 ;Shift Clock (0=External Clock, 1=Internal Clock)
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+ DEF SCF_START EQU % 10000000 ; Transfer Start Flag (1=Transfer in progress, or requested)
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+ DEF SCF_SPEED EQU % 00000010 ; Clock Speed (0=Normal, 1=Fast) ** CGB Mode Only **
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+ DEF SCF_SOURCE EQU % 00000001 ; Shift Clock (0=External Clock, 1=Internal Clock)
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DEF SCB_START EQU 7
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DEF SCB_SPEED EQU 1
@@ -146,6 +245,8 @@ DEF TACF_16KHZ EQU %00000011
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DEF TACF_65KHZ EQU % 00000010
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DEF TACF_262KHZ EQU % 00000001
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+ DEF TACB_START EQU 2
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+
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; --
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; -- IF ($FF0F)
@@ -264,6 +365,9 @@ DEF rAUD2HIGH EQU rNR24
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DEF rNR30 EQU $ FF1A
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DEF rAUD3ENA EQU rNR30
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+ DEF AUD3ENA_OFF EQU % 00000000
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+ DEF AUD3ENA_ON EQU % 10000000
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+
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; --
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; -- AUD3LEN/NR31 ($FF1B)
@@ -288,6 +392,11 @@ DEF rAUD3LEN EQU rNR31
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DEF rNR32 EQU $ FF1C
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DEF rAUD3LEVEL EQU rNR32
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+ DEF AUD3LEVEL_MUTE EQU % 00000000
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+ DEF AUD3LEVEL_100 EQU % 00100000
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+ DEF AUD3LEVEL_50 EQU % 01000000
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+ DEF AUD3LEVEL_25 EQU % 01100000
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+
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; --
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; -- AUD3LOW/NR33 ($FF1D)
@@ -346,6 +455,9 @@ DEF rAUD4ENV EQU rNR42
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DEF rNR43 EQU $ FF22
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DEF rAUD4POLY EQU rNR43
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+ DEF AUD4POLY_15STEP EQU % 00000000
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+ DEF AUD4POLY_7STEP EQU % 00001000
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+
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; --
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; -- AUD4GO/NR44 ($FF23)
@@ -430,8 +542,8 @@ DEF LCDCF_WIN9800 EQU %00000000 ; Window Tile Map Display Select
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DEF LCDCF_WIN9C00 EQU % 01000000 ; Window Tile Map Display Select
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DEF LCDCF_WINOFF EQU % 00000000 ; Window Display
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DEF LCDCF_WINON EQU % 00100000 ; Window Display
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- DEF LCDCF_BG8800 EQU %00000000 ; BG & Window Tile Data Select
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- DEF LCDCF_BG8000 EQU %00010000 ; BG & Window Tile Data Select
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+ DEF LCDCF_BLK21 EQU % 00000000 ; BG & Window Tile Data Select
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+ DEF LCDCF_BLK01 EQU % 00010000 ; BG & Window Tile Data Select
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DEF LCDCF_BG9800 EQU % 00000000 ; BG Tile Map Display Select
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DEF LCDCF_BG9C00 EQU % 00001000 ; BG Tile Map Display Select
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DEF LCDCF_OBJ8 EQU % 00000000 ; OBJ Construction
@@ -440,6 +552,15 @@ DEF LCDCF_OBJOFF EQU %00000000 ; OBJ Display
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DEF LCDCF_OBJON EQU % 00000010 ; OBJ Display
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DEF LCDCF_BGOFF EQU % 00000000 ; BG Display
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DEF LCDCF_BGON EQU % 00000001 ; BG Display
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+
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+ DEF LCDCB_ON EQU 7 ; LCD Control Operation
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+ DEF LCDCB_WIN9C00 EQU 6 ; Window Tile Map Display Select
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+ DEF LCDCB_WINON EQU 5 ; Window Display
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+ DEF LCDCB_BLKS EQU 4 ; BG & Window Tile Data Select
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+ DEF LCDCB_BG9C00 EQU 3 ; BG Tile Map Display Select
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+ DEF LCDCB_OBJ16 EQU 2 ; OBJ Construction
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+ DEF LCDCB_OBJON EQU 1 ; OBJ Display
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+ DEF LCDCB_BGON EQU 0 ; BG Display
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; "Window Character Data Select" follows BG
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@@ -620,6 +741,7 @@ DEF rHDMA5 EQU $FF55
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DEF HDMA5F_MODE_GP EQU % 00000000 ; General Purpose DMA (W)
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DEF HDMA5F_MODE_HBL EQU % 10000000 ; HBlank DMA (W)
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+ DEF HDMA5B_MODE EQU 7 ; DMA mode select (W)
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; -- Once DMA has started, use HDMA5F_BUSY to check when the transfer is complete
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DEF HDMA5F_BUSY EQU % 10000000 ; 0=Busy (DMA still in progress), 1=Transfer complete (R)
@@ -637,37 +759,65 @@ DEF RPF_DATAIN EQU %00000010 ; 0=Receiving IR Signal, 1=Normal
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DEF RPF_WRITE_HI EQU % 00000001
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DEF RPF_WRITE_LO EQU % 00000000
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+ DEF RPB_LED_ON EQU 0
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+ DEF RPB_DATAIN EQU 1
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+
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; --
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- ; -- BCPS ($FF68)
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- ; -- Background Color Palette Specification (R/W)
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+ ; -- BCPS/BGPI ($FF68)
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+ ; -- Background Color Palette Specification (aka Background Palette Index) ( R/W)
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; --
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DEF rBCPS EQU $ FF68
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+ DEF rBGPI EQU rBCPS
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DEF BCPSF_AUTOINC EQU % 10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing)
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+ DEF BCPSB_AUTOINC EQU 7
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+ DEF BGPIF_AUTOINC EQU BCPSF_AUTOINC
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+ DEF BGPIB_AUTOINC EQU BCPSB_AUTOINC
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; --
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- ; -- BCPD ($FF69)
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- ; -- Background Color Palette Data (R/W)
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+ ; -- BCPD/BGPD ($FF69)
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+ ; -- Background Color Palette Data (aka Background Palette Data) ( R/W)
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; --
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DEF rBCPD EQU $ FF69
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+ DEF rBGPD EQU rBCPD
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; --
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- ; -- OCPS ($FF6A)
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- ; -- Object Color Palette Specification (R/W)
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+ ; -- OCPS/OBPI ($FF6A)
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+ ; -- Object Color Palette Specification (aka Object Background Palette Index) ( R/W)
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; --
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DEF rOCPS EQU $ FF6A
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+ DEF rOBPI EQU rOCPS
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DEF OCPSF_AUTOINC EQU % 10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing)
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+ DEF OCPSB_AUTOINC EQU 7
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+ DEF OBPIF_AUTOINC EQU OCPSF_AUTOINC
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+ DEF OBPIB_AUTOINC EQU OCPSB_AUTOINC
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; --
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- ; -- OCPD ($FF6B)
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- ; -- Object Color Palette Data (R/W)
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+ ; -- OCPD/OBPD ($FF6B)
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+ ; -- Object Color Palette Data (aka Object Background Palette Data) ( R/W)
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; --
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DEF rOCPD EQU $ FF6B
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+ DEF rOBPD EQU rOCPD
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+
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+
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+ ; --
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+ ; -- OPRI ($FF6C)
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+ ; -- Object Priority Mode (R/W)
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+ ; -- CGB Only
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+
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+ ; --
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+ ; -- Priority can be changed only from the boot ROM
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+ ; --
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+ DEF rOPRI EQU $ FF6C
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+
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+ DEF OPRI_OAM EQU 0 ; Prioritize objects by location in OAM (CGB Mode default)
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+ DEF OPRI_COORD EQU 1 ; Prioritize objects by x-coordinate (Non-CGB Mode default)
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+
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; --
@@ -753,7 +903,6 @@ DEF AUDENV_DOWN EQU %00000000
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; -- Can be used with AUD1HIGH, AUD2HIGH, AUD3HIGH
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; -- See AUD1HIGH for more info
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; --
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-
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DEF AUDHIGH_RESTART EQU % 10000000
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DEF AUDHIGH_LENGTH_ON EQU % 01000000
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DEF AUDHIGH_LENGTH_OFF EQU % 00000000
@@ -777,10 +926,33 @@ DEF BOOTUP_B_AGB EQU %00000001 ; GBA, GBA SP, Game Boy Player, or New GBA S
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;***************************************************************************
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;*
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- ;* Cart related
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+ ;* Interrupt vector addresses
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+ ;*
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+ ;***************************************************************************
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+
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+ DEF INT_HANDLER_VBLANK EQU $ 0040
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+ DEF INT_HANDLER_ST AT EQU $ 0048
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+ DEF INT_HANDLER_TIMER EQU $ 0050
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+ DEF INT_HANDLER_SERIAL EQU $ 0058
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+ DEF INT_HANDLER_JOYPAD EQU $ 0060
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+
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+
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+ ;***************************************************************************
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+ ;*
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+ ;* Header
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;*
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;***************************************************************************
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+ ;*
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+ ;* Nintendo scrolling logo
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+ ;* (Code won't work on a real GameBoy)
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+ ;* (if next lines are altered.)
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+ MACRO NINTENDO_LOGO
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+ DB $ CE , $ ED , $ 66 , $ 66 , $ CC , $ 0D , $ 00 , $ 0B , $ 03 , $ 73 , $ 00 , $ 83 , $ 00 , $ 0C , $ 00 , $ 0D
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+ DB $ 00 , $ 08 , $ 11 , $ 1F , $ 88 , $ 89 , $ 00 , $ 0E , $ DC , $ CC , $ 6E , $ E6 , $ DD , $ DD , $ D9 , $ 99
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+ DB $ BB , $ BB , $ 67 , $ 63 , $ 6E , $ 0E , $ EC , $ CC , $ DD , $ DC , $ 99 , $ 9F , $ BB , $ B9 , $ 33 , $ 3E
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+ ENDM
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+
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; $0143 Color GameBoy compatibility code
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DEF CART_COMPATIBLE_DMG EQU $ 00
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DEF CART_COMPATIBLE_DMG_GBC EQU $ 80
@@ -837,14 +1009,10 @@ DEF CART_ROM_1536KB EQU $54 ; 96 banks
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; $0149 SRAM size
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; these are kilobytes
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DEF CART_SRAM_NONE EQU 0
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- DEF CART_SRAM_2KB EQU 1 ; 1 incomplete bank
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DEF CART_SRAM_8KB EQU 2 ; 1 bank
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DEF CART_SRAM_32KB EQU 3 ; 4 banks
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DEF CART_SRAM_128KB EQU 4 ; 16 banks
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- DEF CART_SRAM_ENABLE EQU $0A
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- DEF CART_SRAM_DISABLE EQU $00
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-
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1016
; $014A Destination code
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DEF CART_DEST_JAPANESE EQU $ 00
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DEF CART_DEST_NON_JAPANESE EQU $ 01
@@ -882,7 +1050,7 @@ DEF PADB_A EQU $0
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;***************************************************************************
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DEF SCRN_X EQU 160 ; Width of screen in pixels
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- DEF SCRN_Y EQU 144 ; Height of screen in pixels
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+ DEF SCRN_Y EQU 144 ; Height of screen in pixels. Also corresponds to the value in LY at the beginning of VBlank.
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DEF SCRN_X_B EQU 20 ; Width of screen in bytes
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DEF SCRN_Y_B EQU 18 ; Height of screen in bytes
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@@ -930,18 +1098,16 @@ DEF OAMB_PAL1 EQU 4 ; Palette number; 0,1 (DMG)
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DEF OAMB_BANK1 EQU 3 ; Bank number; 0,1 (GBC)
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- ;*
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- ;* Nintendo scrolling logo
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- ;* (Code won't work on a real GameBoy)
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- ;* (if next lines are altered.)
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- MACRO NINTENDO_LOGO
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- DB $CE ,$ED ,$66 ,$66 ,$CC ,$0D ,$00 ,$0B ,$03 ,$73 ,$00 ,$83 ,$00 ,$0C ,$00 ,$0D
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- DB $00 ,$08 ,$11 ,$1F ,$88 ,$89 ,$00 ,$0E ,$DC ,$CC ,$6E ,$E6 ,$DD ,$DD ,$D9 ,$99
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- DB $BB ,$BB ,$67 ,$63 ,$6E ,$0E ,$EC ,$CC ,$DD ,$DC ,$99 ,$9F ,$BB ,$B9 ,$33 ,$3E
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- ENDM
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-
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1101
; Deprecated constants. Please avoid using.
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DEF IEF_LCDC EQU % 00000010 ; LCDC (see STAT)
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+ DEF _VRAM8000 EQU _VRAM
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+ DEF _VRAM8800 EQU _VRAM + $ 800
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+ DEF _VRAM9000 EQU _VRAM + $ 1000
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+ DEF CART_SRAM_2KB EQU 1 ; 1 incomplete bank
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+ DEF LCDCF_BG8800 EQU % 00000000 ; BG & Window Tile Data Select
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+ DEF LCDCF_BG8000 EQU % 00010000 ; BG & Window Tile Data Select
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+ DEF LCDCB_BG8000 EQU 4 ; BG & Window Tile Data Select
1111
+
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ENDC ;HARDWARE_INC
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