Skip to content

Commit e481054

Browse files
committed
AltairZ80: The Big Beautiful PR
This PR contains the following: Adds a new SD Systems SBC200 device. Adds a new SD Systems VFII VersaFloppy II device. Adds ability to load HEX files at a specified address. Adds support for SD Systems ExpandoRAM banked memory. Adds improved DSK image support to the WD179X device. Adds support for formats that don't include the FC index mark to WD179X WRITE_TRACK command. Fixed WD179X VERIFY register. This PR passes Howard's AltairZ80 tests. Additional tests were added here: https://github.com/deltecent/altairz80-tests/ Additional packages were added here: https://github.com/deltecent/altairz80-packages/
1 parent c064bb6 commit e481054

File tree

10 files changed

+2020
-142
lines changed

10 files changed

+2020
-142
lines changed

AltairZ80/altairz80_cpu.c

Lines changed: 42 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -572,6 +572,8 @@ static MTAB cpu_mod[] = {
572572
NULL, NULL, "Sets the RAM type to Cromemco RAM for 8080 / Z80 / 8086" },
573573
{ MTAB_XTD | MTAB_VDV, 4, NULL, "B810", &cpu_set_ramtype,
574574
NULL, NULL, "Sets the RAM type AB Digital Design B810 8080 / Z80 / 8086"},
575+
{ MTAB_XTD | MTAB_VDV, 5, NULL, "ERAM", &cpu_set_ramtype,
576+
NULL, NULL, "Sets the RAM type to SD Systems ERAM for 8080 / Z80 / 8086"},
575577
{ MTAB_VDV, 4, NULL, "4KB", &cpu_set_size,
576578
NULL, NULL, "Sets the RAM size to 4KB for 8080 / Z80 / 8086" },
577579
{ MTAB_VDV, 8, NULL, "8KB", &cpu_set_size,
@@ -631,8 +633,8 @@ static MTAB cpu_mod[] = {
631633

632634
/* Simulator-specific commands */
633635
static CTAB cpu_cmd_tbl[] = {
634-
{ "MEM", &cpu_cmd_memory, 0, "MEM <address> Dump a block of memory\n" },
635-
{ "REG", &cpu_cmd_reg, 0, "REG Display registers\n" },
636+
{ "MEM", &cpu_cmd_memory, 0, "MEM <address> Dump a block of memory\n" },
637+
{ "REG", &cpu_cmd_reg, 0, "REG Display registers\n" },
636638
{ NULL, NULL, 0, NULL }
637639
};
638640

@@ -734,7 +736,8 @@ const char* handlerNameForPort(const int32 port) {
734736
#define RAM_TYPE_VRAM 2 /* Vector Graphic RAM card */
735737
#define RAM_TYPE_CRAM 3 /* Cromemco RAM card */
736738
#define RAM_TYPE_B810 4 /* AB Digital Design B810 RAM card */
737-
#define MAX_RAM_TYPE RAM_TYPE_B810
739+
#define RAM_TYPE_ERAM 5 /* SD Systems ExpandoRAM */
740+
#define MAX_RAM_TYPE RAM_TYPE_ERAM
738741

739742
static int32 ramtype = RAM_TYPE_AZ80;
740743

@@ -6760,7 +6763,7 @@ const static CPUFLAG *cpuflags[NUM_CHIP_TYPE] = { cpuflags8080, cpuflagsZ80,
67606763
cpuflags8086, cpuflagsM68K, };
67616764

67626765
/* needs to be set for each ramtype <= MAX_RAM_TYPE */
6763-
static const char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM", "B810" };
6766+
static const char *ramTypeToString[] = { "AZ80", "HRAM", "VRAM", "CRAM", "B810", "ERAM" };
67646767

67656768
static const char* m68kVariantToString[] = {
67666769
"INVALID",
@@ -7000,6 +7003,13 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) {
70007003
sim_printf("Invalid bank select 0x%02x for B810\n", data);
70017004
}
70027005
break;
7006+
case RAM_TYPE_ERAM:
7007+
if (data < 8) {
7008+
setBankSelect(data);
7009+
} else {
7010+
sim_printf("Invalid bank select 0x%02x for ERAM\n", data);
7011+
}
7012+
break;
70037013
case RAM_TYPE_AZ80:
70047014
default:
70057015
break;
@@ -7143,6 +7153,11 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, CONST char *cptr, void *d
71437153
sim_printf("Unmapping AB Digital Design B810 RAM\n");
71447154
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", TRUE);
71457155
break;
7156+
case RAM_TYPE_ERAM:
7157+
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
7158+
sim_printf("Unmapping SD Systems ExpandoRAM\n");
7159+
sim_map_resource(0xff, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", TRUE);
7160+
break;
71467161
case 0:
71477162
default:
71487163
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
@@ -7171,6 +7186,11 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, CONST char *cptr, void *d
71717186
sim_printf("AB Digital Design B810 RAM Selected\n");
71727187
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", FALSE);
71737188
break;
7189+
case RAM_TYPE_ERAM:
7190+
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
7191+
sim_printf("SD Systems ExpandoRAM Selected\n");
7192+
sim_map_resource(0xff, 1, RESOURCE_TYPE_IO, &bankseldev, "bankseldev", FALSE);
7193+
break;
71747194
case 0:
71757195
default:
71767196
if (cpu_unit.flags & UNIT_CPU_VERBOSE)
@@ -7521,11 +7541,21 @@ static t_stat cpu_hex_load(FILE *fileref, CONST char *cptr, CONST char *fnam, in
75217541
char linebuf[1024], datastr[1024], *bufptr;
75227542
int32 bytecnt, rectype, databyte, chksum, line = 0, cnt = 0;
75237543
uint32 makeROM = FALSE;
7524-
t_addr addr, org = 0;
7544+
t_addr addr, start = 0, offset = 0, org = -1;
7545+
CONST char *result;
75257546

75267547
get_glyph(cptr, gbuf, 0);
75277548
if (strcmp(gbuf, "ROM") == 0) {
75287549
makeROM = TRUE;
7550+
} else {
7551+
start = strtotv(cptr, &result, 16) & ADDRMASKEXTENDED;
7552+
if (cptr != result)
7553+
org = start;
7554+
while (isspace(*result))
7555+
result++;
7556+
get_glyph(result, gbuf, 0);
7557+
if (strcmp(gbuf, "ROM") == 0)
7558+
makeROM = TRUE;
75297559
}
75307560

75317561
while (!feof(fileref)) {
@@ -7556,16 +7586,20 @@ static t_stat cpu_hex_load(FILE *fileref, CONST char *cptr, CONST char *fnam, in
75567586
datastr[sizeof(datastr) - 1] = '\0';
75577587

75587588
if ((rectype == 0) && (bytecnt > 0) && (addr+bytecnt <= MAXMEMORY)) {
7559-
if (cnt == 0)
7560-
org = addr;
7589+
if (cnt == 0) {
7590+
if (org == -1)
7591+
org = addr;
7592+
else
7593+
offset = org - addr;
7594+
}
75617595

75627596
do {
75637597
if (sscanf(bufptr, "%2x", &databyte) != 1) {
75647598
return sim_messagef(SCPE_IERR, "Hex file format error at line %d\n", line);
75657599
}
75667600
bufptr += 2;
75677601

7568-
PutBYTEasROMorRAM(addr++, databyte, makeROM);
7602+
PutBYTEasROMorRAM(offset+addr++, databyte, makeROM);
75697603

75707604
chksum += databyte;
75717605
cnt++;

AltairZ80/altairz80_sys.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,12 +87,14 @@ extern DEVICE jairs1_dev;
8787
extern DEVICE jairp_dev;
8888
extern DEVICE mmd_dev;
8989
extern DEVICE mmdm_dev;
90+
extern DEVICE sbc200_dev;
9091
extern DEVICE sol20_dev;
9192
extern DEVICE sol20k_dev;
9293
extern DEVICE sol20t_dev;
9394
extern DEVICE sol20s_dev;
9495
extern DEVICE sol20p_dev;
9596
extern DEVICE vdm1_dev;
97+
extern DEVICE vfii_dev;
9698

9799
extern DEVICE cromfdc_dev;
98100
extern DEVICE wd179x_dev;
@@ -166,6 +168,9 @@ DEVICE *sim_devices[] = {
166168
&djhdc_dev,
167169
&mmd_dev,
168170
&mmdm_dev,
171+
/* SD Systems */
172+
&sbc200_dev,
173+
&vfii_dev,
169174
/* Processor Technology Devices */
170175
&sol20_dev,
171176
&sol20k_dev,

0 commit comments

Comments
 (0)