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| 1 | +/*- |
| 2 | + * Copyright (c) 2023 Ruslan Bukin < [email protected]> |
| 3 | + * All rights reserved. |
| 4 | + * |
| 5 | + * Redistribution and use in source and binary forms, with or without |
| 6 | + * modification, are permitted provided that the following conditions |
| 7 | + * are met: |
| 8 | + * 1. Redistributions of source code must retain the above copyright |
| 9 | + * notice, this list of conditions and the following disclaimer. |
| 10 | + * 2. Redistributions in binary form must reproduce the above copyright |
| 11 | + * notice, this list of conditions and the following disclaimer in the |
| 12 | + * documentation and/or other materials provided with the distribution. |
| 13 | + * |
| 14 | + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 15 | + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 16 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 17 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 18 | + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 19 | + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 20 | + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 21 | + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 22 | + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 23 | + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 24 | + * SUCH DAMAGE. |
| 25 | + */ |
| 26 | + |
| 27 | +MEMORY |
| 28 | +{ |
| 29 | + flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K |
| 30 | + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K |
| 31 | +} |
| 32 | + |
| 33 | +ENTRY(__start) |
| 34 | +SECTIONS |
| 35 | +{ |
| 36 | + . = 0x08000000; |
| 37 | + .start . : { |
| 38 | + *start.o(.text) |
| 39 | + } > flash |
| 40 | + |
| 41 | + .text : { |
| 42 | + *(.text) |
| 43 | + } > flash |
| 44 | + |
| 45 | + .rodata : { |
| 46 | + *(.rodata) |
| 47 | + } > flash |
| 48 | + |
| 49 | + .ARM.exidx : { |
| 50 | + *(.ARM.exidx) |
| 51 | + } > flash |
| 52 | + |
| 53 | + .rodata.str1.1 : { |
| 54 | + *(.rodata.str1.1) |
| 55 | + } > flash |
| 56 | + |
| 57 | + /* Ensure _smem is associated with the next section */ |
| 58 | + . = .; |
| 59 | + _smem = ABSOLUTE(.); |
| 60 | + .data : { |
| 61 | + _sdata = ABSOLUTE(.); |
| 62 | + *(.data) |
| 63 | + _edata = ABSOLUTE(.); |
| 64 | + } > sram1 AT > flash |
| 65 | + |
| 66 | + .bss : { |
| 67 | + _sbss = ABSOLUTE(.); |
| 68 | + *(.bss COMMON) |
| 69 | + *(.sbss) |
| 70 | + _ebss = ABSOLUTE(.); |
| 71 | + } > sram1 |
| 72 | + |
| 73 | + . = ALIGN(8); |
| 74 | + . = . + 0x1000; /* 4kB of stack memory */ |
| 75 | + stack_top = .; |
| 76 | + _emem = ABSOLUTE(.); |
| 77 | +} |
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