riscv64-asm.c: add jal/jalr

this implements the base instructions, not the pseudoinstructions

examples
 jal ra, 0
 jalr x0, ra, 0

Author: CorruptedVor

riscv64-asm.c

@@ -111,6 +111,8 @@ typedef struct Operand {
     };
 } Operand;
 
+static void asm_emit_i(int token, uint32_t opcode, const Operand* rd, const Operand* rs1, const Operand* rs2);
+
 /* Parse a text containing operand and store the result in OP */
 static void parse_operand(TCCState *s1, Operand *op)
 {
@@ -215,6 +217,9 @@ static void asm_binary_opcode(TCCState* s1, int token)
     case TOK_ASM_auipc:
         asm_emit_u(token, (0x05 << 2) | 3, &ops[0], &ops[1]);
         return;
+    case TOK_ASM_jal:
+        asm_emit_u(token, 0x6f, ops, ops + 1);
+        return;
     default:
         expect("binary instruction");
     }
@@ -399,6 +404,12 @@ static void asm_data_processing_opcode(TCCState* s1, int token)
     case TOK_ASM_sltiu:
          asm_emit_i(token, (0x4 << 2) | 3 | (3 << 12), &ops[0], &ops[1], &ops[2]);
          return;
+
+    /* indirect jump (RD, RS1, IMM); I-format */
+    case TOK_ASM_jalr:
+        asm_emit_i(token, 0x67 | (0 << 12), ops, ops + 1, ops + 2);
+        return;
+
     default:
          expect("known data processing instruction");
     }
@@ -588,6 +599,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token)
 
     case TOK_ASM_lui:
     case TOK_ASM_auipc:
+    case TOK_ASM_jal:
         asm_binary_opcode(s1, token);
         return;
 
@@ -628,6 +640,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token)
     case TOK_ASM_slti:
     case TOK_ASM_sltu:
     case TOK_ASM_sltiu:
+    case TOK_ASM_jalr:
         asm_data_processing_opcode(s1, token);
 	return;