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Description
Description
Hello,
I’m trying to reproduce a simple AES test on the OpenTitan SoC, running on the CW340 FPGA board, with the goal of collecting power traces and evaluating the design against SCA.
In the OpenTitan repository, I found the file sw/device/sca/aes_serial.c, which I think is intended for use with the lowrisc/ot-sca project. This C file seems to be compiled into a binary and loaded onto a customized OpenTitan bitstream that is modified/simplified to enable SCA experiments. However:
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The lowrisc/ot-sca repo only contains bitstreams for CW310, not CW340.
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The bitstreams appear to be pre-built; there is no published source or script to regenerate them.
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There is no CW340-specific support in the ot-sca repo for building bitstreams or collecting traces.
On the other hand, in the cw340-luna-board repository, I found fpga/hdl/cw341_top.v, which may be related to a minimal AES or SCA setup, but I’m unsure how it is meant to be used.
I would appreciate any help with the following:
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Building a minimal OpenTitan bitstream for CW340 that includes AES and minimal peripherals for SCA.
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load a simple AES binary to it.
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Collecting power traces from CW340 for SCA.
Any guidance or working example would be greatly appreciated!