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chore(models): add the Real-ESRGAN general models (#1319)
Signed-off-by: k4yt3x <[email protected]>
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‎CHANGELOG.md

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@@ -5,12 +5,18 @@ All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
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and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
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## [Unreleased]
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### Added
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- Real-ESRGAN models `realesr-general-x4v3` and `realesr-general-wdn-x4v3` (#1319).
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## [6.4.0] - 2025-01-24
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### Added
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- Multi-versioning to critical functions to enhance performance in generic architecture builds.
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- RIFE models v4.25 and v4.26 (#1304).
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- RIFE models `v4.25` and `v4.26` (#1304).
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- Support for processing videos without PTS information (#1278).
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- The feature to copy input streams' metadata to the output streams (#1282).
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- (Video2X Qt6) German translation (#1279).

‎include/libvideo2x/filter_realesrgan.h

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@@ -18,6 +18,7 @@ class FilterRealesrgan : public Filter {
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int gpuid = 0,
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bool tta_mode = false,
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int scaling_factor = 4,
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int noise_level = 0,
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const fsutils::StringType model_name = STR("realesr-animevideov3")
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);
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@@ -47,6 +48,7 @@ class FilterRealesrgan : public Filter {
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int gpuid_;
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bool tta_mode_;
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int scaling_factor_;
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int noise_level_;
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const fsutils::StringType model_name_;
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AVRational in_time_base_;
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AVRational out_time_base_;

‎models/realesrgan/realesr-generalv3-wdn-x4.bin

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‎models/realesrgan/realesr-generalv3-wdn-x4.param

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Input data 0 1 data
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Split splitncnn_input0 1 2 data data_splitncnn_0 data_splitncnn_1
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Convolution /Conv 1 1 data_splitncnn_1 /Conv_output_0 0=64 1=3 4=1 5=1 6=1728
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PReLU /PRelu 1 1 /Conv_output_0 /PRelu_output_0 0=64
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Convolution /Conv_1 1 1 /PRelu_output_0 /Conv_1_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_1 1 1 /Conv_1_output_0 /PRelu_1_output_0 0=64
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Convolution /Conv_2 1 1 /PRelu_1_output_0 /Conv_2_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_2 1 1 /Conv_2_output_0 /PRelu_2_output_0 0=64
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Convolution /Conv_3 1 1 /PRelu_2_output_0 /Conv_3_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_3 1 1 /Conv_3_output_0 /PRelu_3_output_0 0=64
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Convolution /Conv_4 1 1 /PRelu_3_output_0 /Conv_4_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_4 1 1 /Conv_4_output_0 /PRelu_4_output_0 0=64
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Convolution /Conv_5 1 1 /PRelu_4_output_0 /Conv_5_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_5 1 1 /Conv_5_output_0 /PRelu_5_output_0 0=64
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Convolution /Conv_6 1 1 /PRelu_5_output_0 /Conv_6_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_6 1 1 /Conv_6_output_0 /PRelu_6_output_0 0=64
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Convolution /Conv_7 1 1 /PRelu_6_output_0 /Conv_7_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_7 1 1 /Conv_7_output_0 /PRelu_7_output_0 0=64
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Convolution /Conv_8 1 1 /PRelu_7_output_0 /Conv_8_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_8 1 1 /Conv_8_output_0 /PRelu_8_output_0 0=64
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Convolution /Conv_9 1 1 /PRelu_8_output_0 /Conv_9_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_9 1 1 /Conv_9_output_0 /PRelu_9_output_0 0=64
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Convolution /Conv_10 1 1 /PRelu_9_output_0 /Conv_10_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_10 1 1 /Conv_10_output_0 /PRelu_10_output_0 0=64
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Convolution /Conv_11 1 1 /PRelu_10_output_0 /Conv_11_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_11 1 1 /Conv_11_output_0 /PRelu_11_output_0 0=64
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Convolution /Conv_12 1 1 /PRelu_11_output_0 /Conv_12_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_12 1 1 /Conv_12_output_0 /PRelu_12_output_0 0=64
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Convolution /Conv_13 1 1 /PRelu_12_output_0 /Conv_13_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_13 1 1 /Conv_13_output_0 /PRelu_13_output_0 0=64
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Convolution /Conv_14 1 1 /PRelu_13_output_0 /Conv_14_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_14 1 1 /Conv_14_output_0 /PRelu_14_output_0 0=64
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Convolution /Conv_15 1 1 /PRelu_14_output_0 /Conv_15_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_15 1 1 /Conv_15_output_0 /PRelu_15_output_0 0=64
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Convolution /Conv_16 1 1 /PRelu_15_output_0 /Conv_16_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_16 1 1 /Conv_16_output_0 /PRelu_16_output_0 0=64
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Convolution /Conv_17 1 1 /PRelu_16_output_0 /Conv_17_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_17 1 1 /Conv_17_output_0 /PRelu_17_output_0 0=64
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Convolution /Conv_18 1 1 /PRelu_17_output_0 /Conv_18_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_18 1 1 /Conv_18_output_0 /PRelu_18_output_0 0=64
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Convolution /Conv_19 1 1 /PRelu_18_output_0 /Conv_19_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_19 1 1 /Conv_19_output_0 /PRelu_19_output_0 0=64
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Convolution /Conv_20 1 1 /PRelu_19_output_0 /Conv_20_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_20 1 1 /Conv_20_output_0 /PRelu_20_output_0 0=64
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Convolution /Conv_21 1 1 /PRelu_20_output_0 /Conv_21_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_21 1 1 /Conv_21_output_0 /PRelu_21_output_0 0=64
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Convolution /Conv_22 1 1 /PRelu_21_output_0 /Conv_22_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_22 1 1 /Conv_22_output_0 /PRelu_22_output_0 0=64
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Convolution /Conv_23 1 1 /PRelu_22_output_0 /Conv_23_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_23 1 1 /Conv_23_output_0 /PRelu_23_output_0 0=64
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Convolution /Conv_24 1 1 /PRelu_23_output_0 /Conv_24_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_24 1 1 /Conv_24_output_0 /PRelu_24_output_0 0=64
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Convolution /Conv_25 1 1 /PRelu_24_output_0 /Conv_25_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_25 1 1 /Conv_25_output_0 /PRelu_25_output_0 0=64
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Convolution /Conv_26 1 1 /PRelu_25_output_0 /Conv_26_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_26 1 1 /Conv_26_output_0 /PRelu_26_output_0 0=64
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Convolution /Conv_27 1 1 /PRelu_26_output_0 /Conv_27_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_27 1 1 /Conv_27_output_0 /PRelu_27_output_0 0=64
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Convolution /Conv_28 1 1 /PRelu_27_output_0 /Conv_28_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_28 1 1 /Conv_28_output_0 /PRelu_28_output_0 0=64
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Convolution /Conv_29 1 1 /PRelu_28_output_0 /Conv_29_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_29 1 1 /Conv_29_output_0 /PRelu_29_output_0 0=64
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Convolution /Conv_30 1 1 /PRelu_29_output_0 /Conv_30_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_30 1 1 /Conv_30_output_0 /PRelu_30_output_0 0=64
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Convolution /Conv_31 1 1 /PRelu_30_output_0 /Conv_31_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_31 1 1 /Conv_31_output_0 /PRelu_31_output_0 0=64
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Convolution /Conv_32 1 1 /PRelu_31_output_0 /Conv_32_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_32 1 1 /Conv_32_output_0 /PRelu_32_output_0 0=64
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Convolution /Conv_33 1 1 /PRelu_32_output_0 /Conv_33_output_0 0=48 1=3 4=1 5=1 6=27648
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PixelShuffle /DepthToSpace 1 1 /Conv_33_output_0 /DepthToSpace_output_0 0=4
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Interp /Resize 1 1 data_splitncnn_0 /Resize_output_0 0=1 1=4.000000e+00 2=4.000000e+00
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BinaryOp /Add 2 1 /DepthToSpace_output_0 /Resize_output_0 /Add_output_0
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Clip /Clip 1 1 /Add_output_0 output 0=0.000000e+00 1=1.000000e+00

‎models/realesrgan/realesr-generalv3-x4.bin

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‎models/realesrgan/realesr-generalv3-x4.param

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Input data 0 1 data
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Split splitncnn_input0 1 2 data data_splitncnn_0 data_splitncnn_1
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Convolution /Conv 1 1 data_splitncnn_1 /Conv_output_0 0=64 1=3 4=1 5=1 6=1728
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PReLU /PRelu 1 1 /Conv_output_0 /PRelu_output_0 0=64
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Convolution /Conv_1 1 1 /PRelu_output_0 /Conv_1_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_1 1 1 /Conv_1_output_0 /PRelu_1_output_0 0=64
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Convolution /Conv_2 1 1 /PRelu_1_output_0 /Conv_2_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_2 1 1 /Conv_2_output_0 /PRelu_2_output_0 0=64
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Convolution /Conv_3 1 1 /PRelu_2_output_0 /Conv_3_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_3 1 1 /Conv_3_output_0 /PRelu_3_output_0 0=64
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Convolution /Conv_4 1 1 /PRelu_3_output_0 /Conv_4_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_4 1 1 /Conv_4_output_0 /PRelu_4_output_0 0=64
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Convolution /Conv_5 1 1 /PRelu_4_output_0 /Conv_5_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_5 1 1 /Conv_5_output_0 /PRelu_5_output_0 0=64
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Convolution /Conv_6 1 1 /PRelu_5_output_0 /Conv_6_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_6 1 1 /Conv_6_output_0 /PRelu_6_output_0 0=64
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Convolution /Conv_7 1 1 /PRelu_6_output_0 /Conv_7_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_7 1 1 /Conv_7_output_0 /PRelu_7_output_0 0=64
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Convolution /Conv_8 1 1 /PRelu_7_output_0 /Conv_8_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_8 1 1 /Conv_8_output_0 /PRelu_8_output_0 0=64
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Convolution /Conv_9 1 1 /PRelu_8_output_0 /Conv_9_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_9 1 1 /Conv_9_output_0 /PRelu_9_output_0 0=64
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Convolution /Conv_10 1 1 /PRelu_9_output_0 /Conv_10_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_10 1 1 /Conv_10_output_0 /PRelu_10_output_0 0=64
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Convolution /Conv_11 1 1 /PRelu_10_output_0 /Conv_11_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_11 1 1 /Conv_11_output_0 /PRelu_11_output_0 0=64
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Convolution /Conv_12 1 1 /PRelu_11_output_0 /Conv_12_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_12 1 1 /Conv_12_output_0 /PRelu_12_output_0 0=64
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Convolution /Conv_13 1 1 /PRelu_12_output_0 /Conv_13_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_13 1 1 /Conv_13_output_0 /PRelu_13_output_0 0=64
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Convolution /Conv_14 1 1 /PRelu_13_output_0 /Conv_14_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_14 1 1 /Conv_14_output_0 /PRelu_14_output_0 0=64
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Convolution /Conv_15 1 1 /PRelu_14_output_0 /Conv_15_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_15 1 1 /Conv_15_output_0 /PRelu_15_output_0 0=64
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Convolution /Conv_16 1 1 /PRelu_15_output_0 /Conv_16_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_16 1 1 /Conv_16_output_0 /PRelu_16_output_0 0=64
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Convolution /Conv_17 1 1 /PRelu_16_output_0 /Conv_17_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_17 1 1 /Conv_17_output_0 /PRelu_17_output_0 0=64
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Convolution /Conv_18 1 1 /PRelu_17_output_0 /Conv_18_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_18 1 1 /Conv_18_output_0 /PRelu_18_output_0 0=64
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Convolution /Conv_19 1 1 /PRelu_18_output_0 /Conv_19_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_19 1 1 /Conv_19_output_0 /PRelu_19_output_0 0=64
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Convolution /Conv_20 1 1 /PRelu_19_output_0 /Conv_20_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_20 1 1 /Conv_20_output_0 /PRelu_20_output_0 0=64
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Convolution /Conv_21 1 1 /PRelu_20_output_0 /Conv_21_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_21 1 1 /Conv_21_output_0 /PRelu_21_output_0 0=64
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Convolution /Conv_22 1 1 /PRelu_21_output_0 /Conv_22_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_22 1 1 /Conv_22_output_0 /PRelu_22_output_0 0=64
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Convolution /Conv_23 1 1 /PRelu_22_output_0 /Conv_23_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_23 1 1 /Conv_23_output_0 /PRelu_23_output_0 0=64
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Convolution /Conv_24 1 1 /PRelu_23_output_0 /Conv_24_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_24 1 1 /Conv_24_output_0 /PRelu_24_output_0 0=64
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Convolution /Conv_25 1 1 /PRelu_24_output_0 /Conv_25_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_25 1 1 /Conv_25_output_0 /PRelu_25_output_0 0=64
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Convolution /Conv_26 1 1 /PRelu_25_output_0 /Conv_26_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_26 1 1 /Conv_26_output_0 /PRelu_26_output_0 0=64
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Convolution /Conv_27 1 1 /PRelu_26_output_0 /Conv_27_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_27 1 1 /Conv_27_output_0 /PRelu_27_output_0 0=64
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Convolution /Conv_28 1 1 /PRelu_27_output_0 /Conv_28_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_28 1 1 /Conv_28_output_0 /PRelu_28_output_0 0=64
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Convolution /Conv_29 1 1 /PRelu_28_output_0 /Conv_29_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_29 1 1 /Conv_29_output_0 /PRelu_29_output_0 0=64
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Convolution /Conv_30 1 1 /PRelu_29_output_0 /Conv_30_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_30 1 1 /Conv_30_output_0 /PRelu_30_output_0 0=64
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Convolution /Conv_31 1 1 /PRelu_30_output_0 /Conv_31_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_31 1 1 /Conv_31_output_0 /PRelu_31_output_0 0=64
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Convolution /Conv_32 1 1 /PRelu_31_output_0 /Conv_32_output_0 0=64 1=3 4=1 5=1 6=36864
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PReLU /PRelu_32 1 1 /Conv_32_output_0 /PRelu_32_output_0 0=64
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Convolution /Conv_33 1 1 /PRelu_32_output_0 /Conv_33_output_0 0=48 1=3 4=1 5=1 6=27648
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PixelShuffle /DepthToSpace 1 1 /Conv_33_output_0 /DepthToSpace_output_0 0=4
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Interp /Resize 1 1 data_splitncnn_0 /Resize_output_0 0=1 1=4.000000e+00 2=4.000000e+00
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BinaryOp /Add 2 1 /DepthToSpace_output_0 /Resize_output_0 /Add_output_0
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Clip /Clip 1 1 /Add_output_0 output 0=0.000000e+00 1=1.000000e+00

‎src/filter_realesrgan.cpp

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,14 @@ FilterRealesrgan::FilterRealesrgan(
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int gpuid,
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bool tta_mode,
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int scaling_factor,
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int noise_level,
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const fsutils::StringType model_name
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)
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: realesrgan_(nullptr),
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gpuid_(gpuid),
2425
tta_mode_(tta_mode),
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scaling_factor_(scaling_factor),
27+
noise_level_(noise_level),
2628
model_name_(std::move(model_name)) {}
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2830
FilterRealesrgan::~FilterRealesrgan() {
@@ -35,10 +37,16 @@ int FilterRealesrgan::init(AVCodecContext* dec_ctx, AVCodecContext* enc_ctx, AVB
3537
std::filesystem::path model_param_path;
3638
std::filesystem::path model_bin_path;
3739

38-
fsutils::StringType param_file_name =
39-
model_name_ + STR("-x") + fsutils::to_string_type(scaling_factor_) + STR(".param");
40-
fsutils::StringType bin_file_name =
41-
model_name_ + STR("-x") + fsutils::to_string_type(scaling_factor_) + STR(".bin");
40+
fsutils::StringType param_file_name = model_name_;
41+
fsutils::StringType bin_file_name = model_name_;
42+
43+
if (model_name_ == STR("realesr-generalv3") && noise_level_ > 0) {
44+
param_file_name += STR("-wdn");
45+
bin_file_name += STR("-wdn");
46+
}
47+
48+
param_file_name += STR("-x") + fsutils::to_string_type(scaling_factor_) + STR(".param");
49+
bin_file_name += STR("-x") + fsutils::to_string_type(scaling_factor_) + STR(".bin");
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4351
// Find the model paths by model name if provided
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model_param_path = std::filesystem::path(STR("models")) / STR("realesrgan") / param_file_name;

‎src/processor_factory.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,7 @@ void ProcessorFactory::init_default_processors(ProcessorFactory& factory) {
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static_cast<int>(vk_device_index),
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config.tta_mode,
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proc_cfg.scaling_factor,
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proc_cfg.noise_level,
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config.model_name
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);
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}

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