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CCxCfg.h
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// CCxCfg.h Configuration settings for the chipcon CCxxxx series transceivers
//
// Copyright (c) 2010 Hans Klunder <hans.klunder (at) bigfoot.com>
// Author: Hans Klunder, based on the original Rfbee v1.0 firmware by Seeedstudio
// Version: August 27, 2010
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2.1 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#ifndef CCXCFG_H
#define CCXCFG_H
#include "CCx.h"
#include <avr/pgmspace.h>
#define CCX_NR_OF_REGISTERS 36
// list the registers in the same order as CCxRegisterSettings
// stored in progmem to save on RAM
static const byte CCx_registers[CCX_NR_OF_REGISTERS] PROGMEM ={
CCx_FSCTRL1 ,
CCx_FSCTRL0 ,
CCx_FREQ2 ,
CCx_FREQ1 ,
CCx_FREQ0 ,
CCx_MDMCFG4 ,
CCx_MDMCFG3 ,
CCx_MDMCFG2 ,
CCx_MDMCFG1 ,
CCx_MDMCFG0 ,
CCx_CHANNR ,
CCx_DEVIATN ,
CCx_FREND1 ,
CCx_FREND0 ,
CCx_MCSM0 ,
CCx_FOCCFG ,
CCx_BSCFG ,
CCx_AGCCTRL2 ,
CCx_AGCCTRL1 ,
CCx_AGCCTRL0 ,
CCx_FSCAL3 ,
CCx_FSCAL2 ,
CCx_FSCAL1 ,
CCx_FSCAL0 ,
CCx_FSTEST ,
CCx_TEST2 ,
CCx_TEST1 ,
CCx_TEST0 ,
CCx_FIFOTHR ,
CCx_IOCFG2 ,
CCx_IOCFG1 ,
CCx_IOCFG0D ,
CCx_PKTCTRL1 ,
CCx_PKTCTRL0 ,
CCx_ADDR ,
CCx_PKTLEN ,
};
#define CCX_NR_OF_CONFIGS 1
// configuration for CC1101 generated by TI's SmartRf studio
// stored in progmem to save on RAM
static const byte CCx_registerSettings[CCX_NR_OF_CONFIGS][CCX_NR_OF_REGISTERS] PROGMEM = {
{
0x06, // FSCTRL1 Frequency synthesizer control.
0x00, // FSCTRL0 Frequency synthesizer control.
0x21, // FREQ2 Frequency control word, high byte.
0x65, // FREQ1 Frequency control word, middle byte.
0xCC, // FREQ0 Frequency control word, low byte.
0x6A, // MDMCFG4 Modem configuration.
0x83, // MDMCFG3 Modem configuration.
0x04, // MDMCFG2 Modem configuration.
0x22, // MDMCFG1 Modem configuration.
0xF8, // MDMCFG0 Modem configuration.
0x00, // CHANNR Channel number.
0x50, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
0x56, // FREND1 Front end RX configuration.
0x08, // FREND0 Front end TX configuration.
0x18, // MCSM0 Main Radio Control State Machine configuration.
0x16, // FOCCFG Frequency Offset Compensation Configuration.
0x6C, // BSCFG Bit synchronization Configuration.
0x43, // AGCCTRL2 AGC control.
0x78, // AGCCTRL1 AGC control. //was 40
0x91, // AGCCTRL0 AGC control.
0xE9, // FSCAL3 Frequency synthesizer calibration.
0x2A, // FSCAL2 Frequency synthesizer calibration.
0x00, // FSCAL1 Frequency synthesizer calibration.
0x1F, // FSCAL0 Frequency synthesizer calibration.
0x59, // FSTEST Frequency synthesizer calibration.
0x81, // TEST2 Various test settings.
0x35, // TEST1 Various test settings.
0x09, // TEST0 Various test settings.
0x07, // FIFOTHR RXFIFO and TXFIFO thresholds.
0x0D, // IOCFG2 GDO2 output pin configuration.0x09-CCA mode, 0x2E-High impedance
0x0D, // IOCFG1
0x0E, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
0x00, // PKTCTRL1 Packet automation control. bit2 = 1 append RSSI and LQI ,bit2 = 0 not append
0x32, // PKTCTRL0 Packet automation control.
0x00, // ADDR Device address.
CCx_PACKT_LEN, // PKTLEN Packet length.
},
};
// PATABLE (dBm output power)
// stored in progmem to save on RAM
static const byte CCx_paTable[CCX_NR_OF_CONFIGS][CCx_PA_TABLESIZE] PROGMEM ={
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
};
#endif