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jtag-wire-adapter

status - completed license - CERN-OHL-P-2.0 Upload to AISLER

A compact adapter board for connecting SEGGER J-Link debug probes to generic JTAG/SWD targets using a set of flying wires.

View Schematic 📄 or PCB Preview 🌐.

Key features

  • Snug-fit debug probe connector
  • .100" pin header for flying wire connection
  • Signal assignment printed on silk screen

Interested? Click the button below to push this project to AISLER and get your PCB fabricated.

Overview

This adapter can be used to interface a SEGGER J-Link debug probe to a generic JTAG or SWD target, using .1" DuPont-style jumper wires. This low cost solution can be especially useful for academic users of J-Link EDU probes, as it doesn't require special connector hardware to be fitted on target project boards.

BOM

The parts are generic and can be found pretty much anywhere on the internet.

Designator Description
J1 Right-angle socket header, 2x10 contacts, .100" spacing
Suggested: SFH11-PBPC-D10-RA (Digikey S9205-ND)
J2 Right-angle pin header, 1x7 contacts, .100" spacing

Design Review and Validation

Prototype PCBs were fabricated in the EU at AISLER B.V. using their integrated KiCad plugin. See photos for further details.

  • The selected stacked-row header seems to be just short enough to accidentally fit with a column offset. A wider connector should be selected to prevent wrong connection.

    • The "original" connector as used on other adpters is a Sullins Connector Solutions SFH11-PBPC-D10-RA (available from Digikey as S9205-ND).

A tool compatibility test was performed using a SEGGER J-LinkEDU emulator and a "blue pill"-type STM32 board.

Photos

   

Licensing

If not stated otherwise within the specific file, the contents of this project are licensed under the CERN Open Hardware Licence Version 2 - Permissive. The full license text is provided in the LICENSE document.

    SPDX-License-Identifier: CERN-OHL-P-2.0

This licensing model is compliant with the Open Source Hardware Definition 1.0.