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drift.ucf
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NET "XCLK" TNM_NET = "XCLK";
TIMESPEC "TS_XCLK" = PERIOD "XCLK" 41.67 ns HIGH 50 %;
# Normal drift design
NET "LED<0>" LOC = "P62" | IOSTANDARD = LVCMOS25 ;
NET "LED<1>" LOC = "P61" | IOSTANDARD = LVCMOS25 ;
NET "XADR" LOC = "P74" | IOSTANDARD = LVCMOS25 ;
NET "XCLK" LOC = "P76" | IOSTANDARD = LVCMOS25 ;
NET "XDATA<0>" LOC = "P87" | IOSTANDARD = LVTTL ;
NET "XDATA<1>" LOC = "P86" | IOSTANDARD = LVTTL ;
NET "XDATA<2>" LOC = "P85" | IOSTANDARD = LVTTL ;
NET "XDATA<3>" LOC = "P83" | IOSTANDARD = LVTTL ;
NET "XDATA<4>" LOC = "P81" | IOSTANDARD = LVTTL ;
NET "XDATA<5>" LOC = "P80" | IOSTANDARD = LVTTL ;
NET "XDATA<6>" LOC = "P79" | IOSTANDARD = LVTTL ;
NET "XDATA<7>" LOC = "P78" | IOSTANDARD = LVCMOS25 ;
NET "XIFAD<0>" LOC = "P67" | IOSTANDARD = LVCMOS25 ;
NET "XIFAD<1>" LOC = "P65" | IOSTANDARD = LVCMOS25 ;
NET "XIFCLK" LOC = "P111" | IOSTANDARD = LVTTL ;
NET "XIFDATA<0>" LOC = "P107" | IOSTANDARD = LVTTL ;
NET "XIFDATA<1>" LOC = "P106" | IOSTANDARD = LVTTL ;
NET "XIFDATA<2>" LOC = "P102" | IOSTANDARD = LVTTL ;
NET "XIFDATA<3>" LOC = "P101" | IOSTANDARD = LVTTL ;
NET "XIFDATA<4>" LOC = "P100" | IOSTANDARD = LVTTL ;
NET "XIFDATA<5>" LOC = "P97" | IOSTANDARD = LVTTL ;
NET "XIFDATA<6>" LOC = "P96" | IOSTANDARD = LVTTL ;
NET "XIFDATA<7>" LOC = "P95" | IOSTANDARD = LVTTL ;
NET "XIFFULL" LOC = "P93" | IOSTANDARD = LVTTL ;
NET "XIFOE" LOC = "P71" | IOSTANDARD = LVCMOS25 ;
NET "XIFRD" LOC = "P50" | IOSTANDARD = LVCMOS25 ;
NET "XIFWR" LOC = "P48" | IOSTANDARD = LVCMOS25 ;
NET "XIN<0>" LOC = "P133" | IOSTANDARD = LVTTL ;
NET "XIN<1>" LOC = "P137" | IOSTANDARD = LVTTL ;
NET "XIN<10>" LOC = "P146" | IOSTANDARD = LVTTL ;
NET "XIN<11>" LOC = "P148" | IOSTANDARD = LVTTL ;
NET "XIN<12>" LOC = "P117" | IOSTANDARD = LVTTL ;
NET "XIN<13>" LOC = "P120" | IOSTANDARD = LVTTL ;
NET "XIN<14>" LOC = "P119" | IOSTANDARD = LVTTL ;
NET "XIN<15>" LOC = "P122" | IOSTANDARD = LVTTL ;
NET "XIN<16>" LOC = "P123" | IOSTANDARD = LVTTL ;
NET "XIN<17>" LOC = "P125" | IOSTANDARD = LVTTL ;
NET "XIN<18>" LOC = "P124" | IOSTANDARD = LVTTL ;
NET "XIN<19>" LOC = "P126" | IOSTANDARD = LVTTL ;
NET "XIN<2>" LOC = "P135" | IOSTANDARD = LVTTL ;
NET "XIN<20>" LOC = "P128" | IOSTANDARD = LVTTL ;
NET "XIN<21>" LOC = "P131" | IOSTANDARD = LVTTL ;
NET "XIN<22>" LOC = "P130" | IOSTANDARD = LVTTL ;
NET "XIN<23>" LOC = "P132" | IOSTANDARD = LVTTL ;
NET "XIN<3>" LOC = "P138" | IOSTANDARD = LVTTL ;
NET "XIN<4>" LOC = "P139" | IOSTANDARD = LVTTL ;
NET "XIN<5>" LOC = "P141" | IOSTANDARD = LVTTL ;
NET "XIN<6>" LOC = "P140" | IOSTANDARD = LVTTL ;
NET "XIN<7>" LOC = "P143" | IOSTANDARD = LVTTL ;
NET "XIN<8>" LOC = "P144" | IOSTANDARD = LVTTL ;
NET "XIN<9>" LOC = "P147" | IOSTANDARD = LVTTL ;
NET "XPKTE" LOC = "P64" | IOSTANDARD = LVCMOS25 ;
NET "XRSTR" LOC = "P72" | IOSTANDARD = LVCMOS25 ;
NET "XTRIG_FX2" LOC = "P68" | IOSTANDARD = LVCMOS25 ;
NET "XTRIG_IN_N" LOC = "P52" | IOSTANDARD = LVDS_25 ;
NET "XTRIG_IN_P" LOC = "P51" | IOSTANDARD = LVDS_25 ;
NET "XTRIG_OUT_N" LOC = "P58" | IOSTANDARD = LVDS_25 | SLEW = SLOW | DRIVE = 8 ;
NET "XTRIG_OUT_P" LOC = "P57" | IOSTANDARD = LVDS_25 | SLEW = SLOW | DRIVE = 8 ;
NET "XWSTR" LOC = "P108" | IOSTANDARD = LVTTL ;
NET "XPWOUT" LOC = "P190" | IOSTANDARD = LVTTL ;
NET "XPAN_P" LOC = "P10" | IOSTANDARD = LVDS_25 ;
NET "XPAN_N" LOC = "P11" | IOSTANDARD = LVDS_25 ;
NET "XCMP_P" LOC = "P12" | IOSTANDARD = LVDS_25 ;
NET "XCMP_N" LOC = "P13" | IOSTANDARD = LVDS_25 ;
NET "XINT_P" LOC = "P18" | IOSTANDARD = LVDS_25 ;
NET "XINT_N" LOC = "P19" | IOSTANDARD = LVDS_25 ;
NET "XNAN_P" LOC = "P20" | IOSTANDARD = LVDS_25 ;
NET "XNAN_N" LOC = "P21" | IOSTANDARD = LVDS_25 ;
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE